Struct stm32g0::stm32g0c1::tim15::ccmr1_output::OC1PE_R [−][src]
pub struct OC1PE_R(_);
Expand description
Field OC1PE
reader - Output Compare 1 preload enable Note: These bits can not be modified as long as LOCK level 3 has been programmed (LOCK bits in TIMx_BDTR register) and CC1S=â00â (the channel is configured in output). The PWM mode can be used without validating the preload register only in one pulse mode (OPM bit set in TIMx_CR1 register). Else the behavior is not guaranteed.
Implementations
Methods from Deref<Target = FieldReader<bool, OC1PE_A>>
Returns true
if the bit is clear (0).
Returns true
if the bit is set (1).