Struct stm32g0::stm32g0c1::dac::dac_swtrgr::W [−][src]
pub struct W(_);
Expand description
Register DAC_SWTRGR
writer
Implementations
Bit 0 - DAC channel1 software trigger This bit is set by software to trigger the DAC in software trigger mode. Note: This bit is cleared by hardware (one dac_pclk clock cycle later) once the DAC_DHR1 register value has been loaded into the DAC_DOR1 register.
Bit 1 - DAC channel2 software trigger This bit is set by software to trigger the DAC in software trigger mode. Note: This bit is cleared by hardware (one dac_pclk clock cycle later) once the DAC_DHR2 register value has been loaded into the DAC_DOR2 register. This bit is available only on dual-channel DACs. Refer to implementation.
Methods from Deref<Target = W<DAC_SWTRGR_SPEC>>
Trait Implementations
Performs the conversion.