Struct stm32g0::stm32g0b0::usart1::cr1_fifo_enabled::DEDT_W[][src]

pub struct DEDT_W<'a> { /* fields omitted */ }
Expand description

Field DEDT writer - Driver Enable deassertion time This 5-bit value defines the time between the end of the last stop bit, in a transmitted message, and the de-activation of the DE (Driver Enable) signal. It is expressed in sample time units (1/8 or 1/16 bit time, depending on the oversampling rate). If the USART_TDR register is written during the DEDT time, the new data is transmitted only when the DEDT and DEAT times have both elapsed. This bitfield can only be written when the USART is disabled (UEÂ =Â 0). Note: If the Driver Enable feature is not supported, this bit is reserved and must be kept at reset value. Refer to .

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Writes raw bits to the field

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