Struct stm32g0::stm32g0b0::tim3::dcr::R

pub struct R(_);

Register DCR reader

Implementations

impl R

pub fn dba(&self) -> DBA_R

Bits 0:4 - DMA base address This 5-bit vector defines the base-address for DMA transfers (when read/write access are done through the TIMx_DMAR address). DBA is defined as an offset starting from the address of the TIMx_CR1 register. Example: … Example: Let us consider the following transfer: DBL = 7 transfers & DBA = TIMx_CR1. In this case the transfer is done to/from 7 registers starting from the TIMx_CR1 address.

pub fn dbl(&self) -> DBL_R

Bits 8:12 - DMA burst length This 5-bit vector defines the number of DMA transfers (the timer recognizes a burst transfer when a read or a write access is done to the TIMx_DMAR address). …

Methods from Deref<Target = R<DCR_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<DCR_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<DCR_SPEC>> for R

fn from(reader: R<DCR_SPEC>) -> Self

Performs the conversion.