Struct stm32g0::stm32g0b0::iwdg::iwdg_pr::R

pub struct R(_);

Register IWDG_PR reader

Implementations

impl R

pub fn pr(&self) -> PR_R

Bits 0:2 - Prescaler divider These bits are write access protected see . They are written by software to select the prescaler divider feeding the counter clock. PVU bit of the must be reset in order to be able to change the prescaler divider. Note: Reading this register returns the prescaler value from the VDD voltage domain. This value may not be up to date/valid if a write operation to this register is ongoing. For this reason the value read from this register is valid only when the PVU bit in the status register (IWDG_SR) is reset.

Methods from Deref<Target = R<IWDG_PR_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<IWDG_PR_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<IWDG_PR_SPEC>> for R

fn from(reader: R<IWDG_PR_SPEC>) -> Self

Performs the conversion.