Struct stm32g0::stm32g081::rcc::pllsyscfgr::PLLP_R [−][src]
pub struct PLLP_R(_);
Expand description
Field PLLP
reader - PLL VCO division factor P for PLLPCLK clock output
Methods from Deref<Target = FieldReader<u8, u8>>
Returns true
if the bit is clear (0).
Returns true
if the bit is set (1).