Struct stm32g0::stm32g081::rcc::pllsyscfgr::PLLM_R [−][src]
pub struct PLLM_R(_);
Expand description
Field PLLM
reader - Division factor M of the PLL input clock divider
Methods from Deref<Target = FieldReader<u8, u8>>
Returns true
if the bit is clear (0).
Returns true
if the bit is set (1).