Struct stm32g0::stm32g081::exti::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {Show 23 fields
pub rtsr1: Reg<RTSR1_SPEC>,
pub ftsr1: Reg<FTSR1_SPEC>,
pub swier1: Reg<SWIER1_SPEC>,
pub rpr1: Reg<RPR1_SPEC>,
pub fpr1: Reg<FPR1_SPEC>,
pub exticr1: Reg<EXTICR1_SPEC>,
pub exticr2: Reg<EXTICR2_SPEC>,
pub exticr3: Reg<EXTICR3_SPEC>,
pub exticr4: Reg<EXTICR4_SPEC>,
pub imr1: Reg<IMR1_SPEC>,
pub emr1: Reg<EMR1_SPEC>,
pub imr2: Reg<IMR2_SPEC>,
pub emr2: Reg<EMR2_SPEC>,
pub hwcfgr7: Reg<HWCFGR7_SPEC>,
pub hwcfgr6: Reg<HWCFGR6_SPEC>,
pub hwcfgr5: Reg<HWCFGR5_SPEC>,
pub hwcfgr4: Reg<HWCFGR4_SPEC>,
pub hwcfgr3: Reg<HWCFGR3_SPEC>,
pub hwcfgr2: Reg<HWCFGR2_SPEC>,
pub hwcfgr1: Reg<HWCFGR1_SPEC>,
pub verr: Reg<VERR_SPEC>,
pub ipidr: Reg<IPIDR_SPEC>,
pub sidr: Reg<SIDR_SPEC>,
// some fields omitted
}
Expand description
Register block
Fields
rtsr1: Reg<RTSR1_SPEC>
0x00 - EXTI rising trigger selection register
ftsr1: Reg<FTSR1_SPEC>
0x04 - EXTI falling trigger selection register
swier1: Reg<SWIER1_SPEC>
0x08 - EXTI software interrupt event register
rpr1: Reg<RPR1_SPEC>
0x0c - EXTI rising edge pending register
fpr1: Reg<FPR1_SPEC>
0x10 - EXTI falling edge pending register
exticr1: Reg<EXTICR1_SPEC>
0x60 - EXTI external interrupt selection register
exticr2: Reg<EXTICR2_SPEC>
0x64 - EXTI external interrupt selection register
exticr3: Reg<EXTICR3_SPEC>
0x68 - EXTI external interrupt selection register
exticr4: Reg<EXTICR4_SPEC>
0x6c - EXTI external interrupt selection register
imr1: Reg<IMR1_SPEC>
0x80 - EXTI CPU wakeup with interrupt mask register
emr1: Reg<EMR1_SPEC>
0x84 - EXTI CPU wakeup with event mask register
imr2: Reg<IMR2_SPEC>
0x90 - EXTI CPU wakeup with interrupt mask register
emr2: Reg<EMR2_SPEC>
0x94 - EXTI CPU wakeup with event mask register
hwcfgr7: Reg<HWCFGR7_SPEC>
0x3d8 - Hardware configuration registers
hwcfgr6: Reg<HWCFGR6_SPEC>
0x3dc - Hardware configuration registers
hwcfgr5: Reg<HWCFGR5_SPEC>
0x3e0 - Hardware configuration registers
hwcfgr4: Reg<HWCFGR4_SPEC>
0x3e4 - Hardware configuration registers
hwcfgr3: Reg<HWCFGR3_SPEC>
0x3e8 - Hardware configuration registers
hwcfgr2: Reg<HWCFGR2_SPEC>
0x3ec - Hardware configuration registers
hwcfgr1: Reg<HWCFGR1_SPEC>
0x3f0 - Hardware configuration registers
verr: Reg<VERR_SPEC>
0x3f4 - AES version register
ipidr: Reg<IPIDR_SPEC>
0x3f8 - AES identification register
sidr: Reg<SIDR_SPEC>
0x3fc - AES size ID register