Struct stm32g0::stm32g070::tim15::sr::UIF_R [−][src]
pub struct UIF_R(_);
Expand description
Field UIF
reader - Update interrupt flag This bit is set by hardware on an update event. It is cleared by software. At overflow regarding the repetition counter value (update if repetition counter = 0) and if the UDIS=0 in the TIMx_CR1 register. When CNT is reinitialized by software using the UG bit in TIMx_EGR register, if URS=0 and UDIS=0 in the TIMx_CR1 register. When CNT is reinitialized by a trigger event (refer to control register (TIM15_SMCR)), if URS=0 and UDIS=0 in the TIMx_CR1 register.
Implementations
Methods from Deref<Target = FieldReader<bool, UIF_A>>
Returns true
if the bit is clear (0).
Returns true
if the bit is set (1).