Struct stm32g0::stm32g070::exti::imr1::R

pub struct R(_);

Register IMR1 reader

Implementations

impl R

pub fn im0(&self) -> IM0_R

Bit 0 - CPU wakeup with interrupt mask on event input

pub fn im1(&self) -> IM1_R

Bit 1 - CPU wakeup with interrupt mask on event input

pub fn im2(&self) -> IM2_R

Bit 2 - CPU wakeup with interrupt mask on event input

pub fn im3(&self) -> IM3_R

Bit 3 - CPU wakeup with interrupt mask on event input

pub fn im4(&self) -> IM4_R

Bit 4 - CPU wakeup with interrupt mask on event input

pub fn im5(&self) -> IM5_R

Bit 5 - CPU wakeup with interrupt mask on event input

pub fn im6(&self) -> IM6_R

Bit 6 - CPU wakeup with interrupt mask on event input

pub fn im7(&self) -> IM7_R

Bit 7 - CPU wakeup with interrupt mask on event input

pub fn im8(&self) -> IM8_R

Bit 8 - CPU wakeup with interrupt mask on event input

pub fn im9(&self) -> IM9_R

Bit 9 - CPU wakeup with interrupt mask on event input

pub fn im10(&self) -> IM10_R

Bit 10 - CPU wakeup with interrupt mask on event input

pub fn im11(&self) -> IM11_R

Bit 11 - CPU wakeup with interrupt mask on event input

pub fn im12(&self) -> IM12_R

Bit 12 - CPU wakeup with interrupt mask on event input

pub fn im13(&self) -> IM13_R

Bit 13 - CPU wakeup with interrupt mask on event input

pub fn im14(&self) -> IM14_R

Bit 14 - CPU wakeup with interrupt mask on event input

pub fn im15(&self) -> IM15_R

Bit 15 - CPU wakeup with interrupt mask on event input

pub fn im16(&self) -> IM16_R

Bit 16 - CPU wakeup with interrupt mask on event input

pub fn im17(&self) -> IM17_R

Bit 17 - CPU wakeup with interrupt mask on event input

pub fn im18(&self) -> IM18_R

Bit 18 - CPU wakeup with interrupt mask on event input

pub fn im19(&self) -> IM19_R

Bit 19 - CPU wakeup with interrupt mask on event input

pub fn im20(&self) -> IM20_R

Bit 20 - CPU wakeup with interrupt mask on event input

pub fn im21(&self) -> IM21_R

Bit 21 - CPU wakeup with interrupt mask on event input

pub fn im22(&self) -> IM22_R

Bit 22 - CPU wakeup with interrupt mask on event input

pub fn im23(&self) -> IM23_R

Bit 23 - CPU wakeup with interrupt mask on event input

pub fn im24(&self) -> IM24_R

Bit 24 - CPU wakeup with interrupt mask on event input

pub fn im25(&self) -> IM25_R

Bit 25 - CPU wakeup with interrupt mask on event input

pub fn im26(&self) -> IM26_R

Bit 26 - CPU wakeup with interrupt mask on event input

pub fn im27(&self) -> IM27_R

Bit 27 - CPU wakeup with interrupt mask on event input

pub fn im28(&self) -> IM28_R

Bit 28 - CPU wakeup with interrupt mask on event input

pub fn im29(&self) -> IM29_R

Bit 29 - CPU wakeup with interrupt mask on event input

pub fn im30(&self) -> IM30_R

Bit 30 - CPU wakeup with interrupt mask on event input

pub fn im31(&self) -> IM31_R

Bit 31 - CPU wakeup with interrupt mask on event input

Methods from Deref<Target = R<IMR1_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<IMR1_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<IMR1_SPEC>> for R

fn from(reader: R<IMR1_SPEC>) -> Self

Performs the conversion.