stm32g0_staging/stm32g0c1/
dmamux.rs

1#[repr(C)]
2#[derive(Debug)]
3///Register block
4pub struct RegisterBlock {
5    ccr: [CCR; 7],
6    _reserved1: [u8; 0x64],
7    csr: CSR,
8    cfr: CFR,
9    _reserved3: [u8; 0x78],
10    rgcr: [RGCR; 4],
11    _reserved4: [u8; 0x30],
12    rgsr: RGSR,
13    rgcfr: RGCFR,
14}
15impl RegisterBlock {
16    ///0x00..0x1c - DMA Multiplexer Channel %s Control register
17    #[inline(always)]
18    pub const fn ccr(&self, n: usize) -> &CCR {
19        &self.ccr[n]
20    }
21    ///Iterator for array of:
22    ///0x00..0x1c - DMA Multiplexer Channel %s Control register
23    #[inline(always)]
24    pub fn ccr_iter(&self) -> impl Iterator<Item = &CCR> {
25        self.ccr.iter()
26    }
27    ///0x80 - DMAMUX request line multiplexer interrupt channel status register
28    #[inline(always)]
29    pub const fn csr(&self) -> &CSR {
30        &self.csr
31    }
32    ///0x84 - DMAMUX request line multiplexer interrupt clear flag register
33    #[inline(always)]
34    pub const fn cfr(&self) -> &CFR {
35        &self.cfr
36    }
37    ///0x100..0x110 - DMAMUX request generator channel x configuration register
38    #[inline(always)]
39    pub const fn rgcr(&self, n: usize) -> &RGCR {
40        &self.rgcr[n]
41    }
42    ///Iterator for array of:
43    ///0x100..0x110 - DMAMUX request generator channel x configuration register
44    #[inline(always)]
45    pub fn rgcr_iter(&self) -> impl Iterator<Item = &RGCR> {
46        self.rgcr.iter()
47    }
48    ///0x140 - DMAMUX request generator interrupt status register
49    #[inline(always)]
50    pub const fn rgsr(&self) -> &RGSR {
51        &self.rgsr
52    }
53    ///0x144 - DMAMUX request generator interrupt clear flag register
54    #[inline(always)]
55    pub const fn rgcfr(&self) -> &RGCFR {
56        &self.rgcfr
57    }
58}
59/**CCR (rw) register accessor: DMA Multiplexer Channel %s Control register
60
61You can [`read`](crate::Reg::read) this register and get [`ccr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ccr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
62
63See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#DMAMUX:CCR[0])
64
65For information about available fields see [`mod@ccr`]
66module*/
67pub type CCR = crate::Reg<ccr::CCRrs>;
68///DMA Multiplexer Channel %s Control register
69pub mod ccr;
70/**CSR (r) register accessor: DMAMUX request line multiplexer interrupt channel status register
71
72You can [`read`](crate::Reg::read) this register and get [`csr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
73
74See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#DMAMUX:CSR)
75
76For information about available fields see [`mod@csr`]
77module*/
78pub type CSR = crate::Reg<csr::CSRrs>;
79///DMAMUX request line multiplexer interrupt channel status register
80pub mod csr;
81/**CFR (w) register accessor: DMAMUX request line multiplexer interrupt clear flag register
82
83You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
84
85See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#DMAMUX:CFR)
86
87For information about available fields see [`mod@cfr`]
88module*/
89pub type CFR = crate::Reg<cfr::CFRrs>;
90///DMAMUX request line multiplexer interrupt clear flag register
91pub mod cfr;
92/**RGCR (rw) register accessor: DMAMUX request generator channel x configuration register
93
94You can [`read`](crate::Reg::read) this register and get [`rgcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rgcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
95
96See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#DMAMUX:RGCR[0])
97
98For information about available fields see [`mod@rgcr`]
99module*/
100pub type RGCR = crate::Reg<rgcr::RGCRrs>;
101///DMAMUX request generator channel x configuration register
102pub mod rgcr;
103/**RGSR (r) register accessor: DMAMUX request generator interrupt status register
104
105You can [`read`](crate::Reg::read) this register and get [`rgsr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
106
107See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#DMAMUX:RGSR)
108
109For information about available fields see [`mod@rgsr`]
110module*/
111pub type RGSR = crate::Reg<rgsr::RGSRrs>;
112///DMAMUX request generator interrupt status register
113pub mod rgsr;
114/**RGCFR (w) register accessor: DMAMUX request generator interrupt clear flag register
115
116You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rgcfr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
117
118See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#DMAMUX:RGCFR)
119
120For information about available fields see [`mod@rgcfr`]
121module*/
122pub type RGCFR = crate::Reg<rgcfr::RGCFRrs>;
123///DMAMUX request generator interrupt clear flag register
124pub mod rgcfr;
stm32g0_staging/stm32g0c1/dmamux.rs

stm32g0_staging/stm32g0c1/
dmamux.rs
