stm32g0_staging/stm32g0c1/
aes.rs

1#[repr(C)]
2#[derive(Debug)]
3///Register block
4pub struct RegisterBlock {
5    cr: CR,
6    sr: SR,
7    dinr: DINR,
8    doutr: DOUTR,
9    keyr0: KEYR0,
10    keyr1: KEYR1,
11    keyr2: KEYR2,
12    keyr3: KEYR3,
13    ivr0: IVR0,
14    ivr1: IVR1,
15    ivr2: IVR2,
16    ivr3: IVR3,
17    keyr4: KEYR4,
18    keyr5: KEYR5,
19    keyr6: KEYR6,
20    keyr7: KEYR7,
21    susp0r: SUSP0R,
22    susp1r: SUSP1R,
23    susp2r: SUSP2R,
24    susp3r: SUSP3R,
25    susp4r: SUSP4R,
26    susp5r: SUSP5R,
27    susp6r: SUSP6R,
28    susp7r: SUSP7R,
29}
30impl RegisterBlock {
31    ///0x00 - AES control register
32    #[inline(always)]
33    pub const fn cr(&self) -> &CR {
34        &self.cr
35    }
36    ///0x04 - AES status register
37    #[inline(always)]
38    pub const fn sr(&self) -> &SR {
39        &self.sr
40    }
41    ///0x08 - AES data input register
42    #[inline(always)]
43    pub const fn dinr(&self) -> &DINR {
44        &self.dinr
45    }
46    ///0x0c - AES data output register
47    #[inline(always)]
48    pub const fn doutr(&self) -> &DOUTR {
49        &self.doutr
50    }
51    ///0x10 - AES key register 0
52    #[inline(always)]
53    pub const fn keyr0(&self) -> &KEYR0 {
54        &self.keyr0
55    }
56    ///0x14 - AES key register 1
57    #[inline(always)]
58    pub const fn keyr1(&self) -> &KEYR1 {
59        &self.keyr1
60    }
61    ///0x18 - AES key register 2
62    #[inline(always)]
63    pub const fn keyr2(&self) -> &KEYR2 {
64        &self.keyr2
65    }
66    ///0x1c - AES key register 3
67    #[inline(always)]
68    pub const fn keyr3(&self) -> &KEYR3 {
69        &self.keyr3
70    }
71    ///0x20 - AES initialization vector register 0
72    #[inline(always)]
73    pub const fn ivr0(&self) -> &IVR0 {
74        &self.ivr0
75    }
76    ///0x24 - AES initialization vector register 1
77    #[inline(always)]
78    pub const fn ivr1(&self) -> &IVR1 {
79        &self.ivr1
80    }
81    ///0x28 - AES initialization vector register 2
82    #[inline(always)]
83    pub const fn ivr2(&self) -> &IVR2 {
84        &self.ivr2
85    }
86    ///0x2c - AES initialization vector register 3
87    #[inline(always)]
88    pub const fn ivr3(&self) -> &IVR3 {
89        &self.ivr3
90    }
91    ///0x30 - AES key register 4
92    #[inline(always)]
93    pub const fn keyr4(&self) -> &KEYR4 {
94        &self.keyr4
95    }
96    ///0x34 - AES key register 5
97    #[inline(always)]
98    pub const fn keyr5(&self) -> &KEYR5 {
99        &self.keyr5
100    }
101    ///0x38 - AES key register 6
102    #[inline(always)]
103    pub const fn keyr6(&self) -> &KEYR6 {
104        &self.keyr6
105    }
106    ///0x3c - AES key register 7
107    #[inline(always)]
108    pub const fn keyr7(&self) -> &KEYR7 {
109        &self.keyr7
110    }
111    ///0x40 - AES suspend registers
112    #[inline(always)]
113    pub const fn susp0r(&self) -> &SUSP0R {
114        &self.susp0r
115    }
116    ///0x44 - AES suspend registers
117    #[inline(always)]
118    pub const fn susp1r(&self) -> &SUSP1R {
119        &self.susp1r
120    }
121    ///0x48 - AES suspend registers
122    #[inline(always)]
123    pub const fn susp2r(&self) -> &SUSP2R {
124        &self.susp2r
125    }
126    ///0x4c - AES suspend registers
127    #[inline(always)]
128    pub const fn susp3r(&self) -> &SUSP3R {
129        &self.susp3r
130    }
131    ///0x50 - AES suspend registers
132    #[inline(always)]
133    pub const fn susp4r(&self) -> &SUSP4R {
134        &self.susp4r
135    }
136    ///0x54 - AES suspend registers
137    #[inline(always)]
138    pub const fn susp5r(&self) -> &SUSP5R {
139        &self.susp5r
140    }
141    ///0x58 - AES suspend registers
142    #[inline(always)]
143    pub const fn susp6r(&self) -> &SUSP6R {
144        &self.susp6r
145    }
146    ///0x5c - AES suspend registers
147    #[inline(always)]
148    pub const fn susp7r(&self) -> &SUSP7R {
149        &self.susp7r
150    }
151}
152/**CR (rw) register accessor: AES control register
153
154You can [`read`](crate::Reg::read) this register and get [`cr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
155
156See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#AES:CR)
157
158For information about available fields see [`mod@cr`]
159module*/
160pub type CR = crate::Reg<cr::CRrs>;
161///AES control register
162pub mod cr;
163/**SR (r) register accessor: AES status register
164
165You can [`read`](crate::Reg::read) this register and get [`sr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
166
167See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#AES:SR)
168
169For information about available fields see [`mod@sr`]
170module*/
171pub type SR = crate::Reg<sr::SRrs>;
172///AES status register
173pub mod sr;
174/**DINR (rw) register accessor: AES data input register
175
176You can [`read`](crate::Reg::read) this register and get [`dinr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dinr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
177
178See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#AES:DINR)
179
180For information about available fields see [`mod@dinr`]
181module*/
182pub type DINR = crate::Reg<dinr::DINRrs>;
183///AES data input register
184pub mod dinr;
185/**DOUTR (r) register accessor: AES data output register
186
187You can [`read`](crate::Reg::read) this register and get [`doutr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
188
189See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#AES:DOUTR)
190
191For information about available fields see [`mod@doutr`]
192module*/
193pub type DOUTR = crate::Reg<doutr::DOUTRrs>;
194///AES data output register
195pub mod doutr;
196/**KEYR0 (rw) register accessor: AES key register 0
197
198You can [`read`](crate::Reg::read) this register and get [`keyr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
199
200See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#AES:KEYR0)
201
202For information about available fields see [`mod@keyr0`]
203module*/
204pub type KEYR0 = crate::Reg<keyr0::KEYR0rs>;
205///AES key register 0
206pub mod keyr0;
207/**KEYR1 (rw) register accessor: AES key register 1
208
209You can [`read`](crate::Reg::read) this register and get [`keyr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
210
211See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#AES:KEYR1)
212
213For information about available fields see [`mod@keyr1`]
214module*/
215pub type KEYR1 = crate::Reg<keyr1::KEYR1rs>;
216///AES key register 1
217pub mod keyr1;
218/**KEYR2 (rw) register accessor: AES key register 2
219
220You can [`read`](crate::Reg::read) this register and get [`keyr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
221
222See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#AES:KEYR2)
223
224For information about available fields see [`mod@keyr2`]
225module*/
226pub type KEYR2 = crate::Reg<keyr2::KEYR2rs>;
227///AES key register 2
228pub mod keyr2;
229/**KEYR3 (rw) register accessor: AES key register 3
230
231You can [`read`](crate::Reg::read) this register and get [`keyr3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyr3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
232
233See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#AES:KEYR3)
234
235For information about available fields see [`mod@keyr3`]
236module*/
237pub type KEYR3 = crate::Reg<keyr3::KEYR3rs>;
238///AES key register 3
239pub mod keyr3;
240/**IVR0 (rw) register accessor: AES initialization vector register 0
241
242You can [`read`](crate::Reg::read) this register and get [`ivr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ivr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
243
244See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#AES:IVR0)
245
246For information about available fields see [`mod@ivr0`]
247module*/
248pub type IVR0 = crate::Reg<ivr0::IVR0rs>;
249///AES initialization vector register 0
250pub mod ivr0;
251/**IVR1 (rw) register accessor: AES initialization vector register 1
252
253You can [`read`](crate::Reg::read) this register and get [`ivr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ivr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
254
255See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#AES:IVR1)
256
257For information about available fields see [`mod@ivr1`]
258module*/
259pub type IVR1 = crate::Reg<ivr1::IVR1rs>;
260///AES initialization vector register 1
261pub mod ivr1;
262/**IVR2 (rw) register accessor: AES initialization vector register 2
263
264You can [`read`](crate::Reg::read) this register and get [`ivr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ivr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
265
266See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#AES:IVR2)
267
268For information about available fields see [`mod@ivr2`]
269module*/
270pub type IVR2 = crate::Reg<ivr2::IVR2rs>;
271///AES initialization vector register 2
272pub mod ivr2;
273/**IVR3 (rw) register accessor: AES initialization vector register 3
274
275You can [`read`](crate::Reg::read) this register and get [`ivr3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ivr3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
276
277See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#AES:IVR3)
278
279For information about available fields see [`mod@ivr3`]
280module*/
281pub type IVR3 = crate::Reg<ivr3::IVR3rs>;
282///AES initialization vector register 3
283pub mod ivr3;
284/**KEYR4 (rw) register accessor: AES key register 4
285
286You can [`read`](crate::Reg::read) this register and get [`keyr4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyr4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
287
288See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#AES:KEYR4)
289
290For information about available fields see [`mod@keyr4`]
291module*/
292pub type KEYR4 = crate::Reg<keyr4::KEYR4rs>;
293///AES key register 4
294pub mod keyr4;
295/**KEYR5 (rw) register accessor: AES key register 5
296
297You can [`read`](crate::Reg::read) this register and get [`keyr5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyr5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
298
299See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#AES:KEYR5)
300
301For information about available fields see [`mod@keyr5`]
302module*/
303pub type KEYR5 = crate::Reg<keyr5::KEYR5rs>;
304///AES key register 5
305pub mod keyr5;
306/**KEYR6 (rw) register accessor: AES key register 6
307
308You can [`read`](crate::Reg::read) this register and get [`keyr6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyr6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
309
310See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#AES:KEYR6)
311
312For information about available fields see [`mod@keyr6`]
313module*/
314pub type KEYR6 = crate::Reg<keyr6::KEYR6rs>;
315///AES key register 6
316pub mod keyr6;
317/**KEYR7 (rw) register accessor: AES key register 7
318
319You can [`read`](crate::Reg::read) this register and get [`keyr7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyr7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
320
321See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#AES:KEYR7)
322
323For information about available fields see [`mod@keyr7`]
324module*/
325pub type KEYR7 = crate::Reg<keyr7::KEYR7rs>;
326///AES key register 7
327pub mod keyr7;
328/**SUSP0R (rw) register accessor: AES suspend registers
329
330You can [`read`](crate::Reg::read) this register and get [`susp0r::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`susp0r::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
331
332See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#AES:SUSP0R)
333
334For information about available fields see [`mod@susp0r`]
335module*/
336pub type SUSP0R = crate::Reg<susp0r::SUSP0Rrs>;
337///AES suspend registers
338pub mod susp0r;
339/**SUSP1R (rw) register accessor: AES suspend registers
340
341You can [`read`](crate::Reg::read) this register and get [`susp1r::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`susp1r::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
342
343See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#AES:SUSP1R)
344
345For information about available fields see [`mod@susp1r`]
346module*/
347pub type SUSP1R = crate::Reg<susp1r::SUSP1Rrs>;
348///AES suspend registers
349pub mod susp1r;
350/**SUSP2R (rw) register accessor: AES suspend registers
351
352You can [`read`](crate::Reg::read) this register and get [`susp2r::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`susp2r::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
353
354See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#AES:SUSP2R)
355
356For information about available fields see [`mod@susp2r`]
357module*/
358pub type SUSP2R = crate::Reg<susp2r::SUSP2Rrs>;
359///AES suspend registers
360pub mod susp2r;
361/**SUSP3R (rw) register accessor: AES suspend registers
362
363You can [`read`](crate::Reg::read) this register and get [`susp3r::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`susp3r::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
364
365See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#AES:SUSP3R)
366
367For information about available fields see [`mod@susp3r`]
368module*/
369pub type SUSP3R = crate::Reg<susp3r::SUSP3Rrs>;
370///AES suspend registers
371pub mod susp3r;
372/**SUSP4R (rw) register accessor: AES suspend registers
373
374You can [`read`](crate::Reg::read) this register and get [`susp4r::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`susp4r::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
375
376See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#AES:SUSP4R)
377
378For information about available fields see [`mod@susp4r`]
379module*/
380pub type SUSP4R = crate::Reg<susp4r::SUSP4Rrs>;
381///AES suspend registers
382pub mod susp4r;
383/**SUSP5R (rw) register accessor: AES suspend registers
384
385You can [`read`](crate::Reg::read) this register and get [`susp5r::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`susp5r::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
386
387See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#AES:SUSP5R)
388
389For information about available fields see [`mod@susp5r`]
390module*/
391pub type SUSP5R = crate::Reg<susp5r::SUSP5Rrs>;
392///AES suspend registers
393pub mod susp5r;
394/**SUSP6R (rw) register accessor: AES suspend registers
395
396You can [`read`](crate::Reg::read) this register and get [`susp6r::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`susp6r::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
397
398See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#AES:SUSP6R)
399
400For information about available fields see [`mod@susp6r`]
401module*/
402pub type SUSP6R = crate::Reg<susp6r::SUSP6Rrs>;
403///AES suspend registers
404pub mod susp6r;
405/**SUSP7R (rw) register accessor: AES suspend registers
406
407You can [`read`](crate::Reg::read) this register and get [`susp7r::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`susp7r::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
408
409See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0C1.html#AES:SUSP7R)
410
411For information about available fields see [`mod@susp7r`]
412module*/
413pub type SUSP7R = crate::Reg<susp7r::SUSP7Rrs>;
414///AES suspend registers
415pub mod susp7r;
stm32g0_staging/stm32g0c1/aes.rs

stm32g0_staging/stm32g0c1/
aes.rs
