stm32g0_staging/stm32g0b0/
tamp.rs

1#[repr(C)]
2#[derive(Debug)]
3///Register block
4pub struct RegisterBlock {
5    cr1: CR1,
6    cr2: CR2,
7    _reserved2: [u8; 0x04],
8    fltcr: FLTCR,
9    _reserved3: [u8; 0x1c],
10    ier: IER,
11    sr: SR,
12    misr: MISR,
13    _reserved6: [u8; 0x04],
14    scr: SCR,
15    _reserved7: [u8; 0xc0],
16    bkpr: [BKPR; 5],
17}
18impl RegisterBlock {
19    ///0x00 - TAMP control register 1
20    #[inline(always)]
21    pub const fn cr1(&self) -> &CR1 {
22        &self.cr1
23    }
24    ///0x04 - TAMP control register 2
25    #[inline(always)]
26    pub const fn cr2(&self) -> &CR2 {
27        &self.cr2
28    }
29    ///0x0c - TAMP filter control register
30    #[inline(always)]
31    pub const fn fltcr(&self) -> &FLTCR {
32        &self.fltcr
33    }
34    ///0x2c - TAMP interrupt enable register
35    #[inline(always)]
36    pub const fn ier(&self) -> &IER {
37        &self.ier
38    }
39    ///0x30 - TAMP status register
40    #[inline(always)]
41    pub const fn sr(&self) -> &SR {
42        &self.sr
43    }
44    ///0x34 - TAMP masked interrupt status register
45    #[inline(always)]
46    pub const fn misr(&self) -> &MISR {
47        &self.misr
48    }
49    ///0x3c - TAMP status clear register
50    #[inline(always)]
51    pub const fn scr(&self) -> &SCR {
52        &self.scr
53    }
54    ///0x100..0x114 - TAMP backup %s register
55    #[inline(always)]
56    pub const fn bkpr(&self, n: usize) -> &BKPR {
57        &self.bkpr[n]
58    }
59    ///Iterator for array of:
60    ///0x100..0x114 - TAMP backup %s register
61    #[inline(always)]
62    pub fn bkpr_iter(&self) -> impl Iterator<Item = &BKPR> {
63        self.bkpr.iter()
64    }
65    ///0x100 - TAMP backup 0 register
66    #[inline(always)]
67    pub const fn bkp0r(&self) -> &BKPR {
68        self.bkpr(0)
69    }
70    ///0x104 - TAMP backup 1 register
71    #[inline(always)]
72    pub const fn bkp1r(&self) -> &BKPR {
73        self.bkpr(1)
74    }
75    ///0x108 - TAMP backup 2 register
76    #[inline(always)]
77    pub const fn bkp2r(&self) -> &BKPR {
78        self.bkpr(2)
79    }
80    ///0x10c - TAMP backup 3 register
81    #[inline(always)]
82    pub const fn bkp3r(&self) -> &BKPR {
83        self.bkpr(3)
84    }
85    ///0x110 - TAMP backup 4 register
86    #[inline(always)]
87    pub const fn bkp4r(&self) -> &BKPR {
88        self.bkpr(4)
89    }
90}
91/**CR1 (rw) register accessor: TAMP control register 1
92
93You can [`read`](crate::Reg::read) this register and get [`cr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
94
95See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0B0.html#TAMP:CR1)
96
97For information about available fields see [`mod@cr1`]
98module*/
99pub type CR1 = crate::Reg<cr1::CR1rs>;
100///TAMP control register 1
101pub mod cr1;
102/**CR2 (rw) register accessor: TAMP control register 2
103
104You can [`read`](crate::Reg::read) this register and get [`cr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
105
106See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0B0.html#TAMP:CR2)
107
108For information about available fields see [`mod@cr2`]
109module*/
110pub type CR2 = crate::Reg<cr2::CR2rs>;
111///TAMP control register 2
112pub mod cr2;
113/**FLTCR (rw) register accessor: TAMP filter control register
114
115You can [`read`](crate::Reg::read) this register and get [`fltcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fltcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
116
117See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0B0.html#TAMP:FLTCR)
118
119For information about available fields see [`mod@fltcr`]
120module*/
121pub type FLTCR = crate::Reg<fltcr::FLTCRrs>;
122///TAMP filter control register
123pub mod fltcr;
124/**IER (rw) register accessor: TAMP interrupt enable register
125
126You can [`read`](crate::Reg::read) this register and get [`ier::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ier::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
127
128See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0B0.html#TAMP:IER)
129
130For information about available fields see [`mod@ier`]
131module*/
132pub type IER = crate::Reg<ier::IERrs>;
133///TAMP interrupt enable register
134pub mod ier;
135/**SR (r) register accessor: TAMP status register
136
137You can [`read`](crate::Reg::read) this register and get [`sr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
138
139See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0B0.html#TAMP:SR)
140
141For information about available fields see [`mod@sr`]
142module*/
143pub type SR = crate::Reg<sr::SRrs>;
144///TAMP status register
145pub mod sr;
146/**MISR (r) register accessor: TAMP masked interrupt status register
147
148You can [`read`](crate::Reg::read) this register and get [`misr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
149
150See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0B0.html#TAMP:MISR)
151
152For information about available fields see [`mod@misr`]
153module*/
154pub type MISR = crate::Reg<misr::MISRrs>;
155///TAMP masked interrupt status register
156pub mod misr;
157/**SCR (w) register accessor: TAMP status clear register
158
159You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
160
161See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0B0.html#TAMP:SCR)
162
163For information about available fields see [`mod@scr`]
164module*/
165pub type SCR = crate::Reg<scr::SCRrs>;
166///TAMP status clear register
167pub mod scr;
168/**BKPR (rw) register accessor: TAMP backup %s register
169
170You can [`read`](crate::Reg::read) this register and get [`bkpr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bkpr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
171
172See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G0B0.html#TAMP:BKP[0]R)
173
174For information about available fields see [`mod@bkpr`]
175module*/
176pub type BKPR = crate::Reg<bkpr::BKPRrs>;
177///TAMP backup %s register
178pub mod bkpr;
stm32g0_staging/stm32g0b0/tamp.rs

stm32g0_staging/stm32g0b0/
tamp.rs
