stm32g0_staging/stm32g041/
lpuart.rs

1#[repr(C)]
2#[derive(Debug)]
3///Register block
4pub struct RegisterBlock {
5    cr1: CR1,
6    cr2: CR2,
7    cr3: CR3,
8    brr: BRR,
9    _reserved4: [u8; 0x08],
10    rqr: RQR,
11    isr: ISR,
12    icr: ICR,
13    rdr: RDR,
14    tdr: TDR,
15    presc: PRESC,
16}
17impl RegisterBlock {
18    ///0x00 - Control register 1
19    #[inline(always)]
20    pub const fn cr1(&self) -> &CR1 {
21        &self.cr1
22    }
23    ///0x04 - Control register 2
24    #[inline(always)]
25    pub const fn cr2(&self) -> &CR2 {
26        &self.cr2
27    }
28    ///0x08 - Control register 3
29    #[inline(always)]
30    pub const fn cr3(&self) -> &CR3 {
31        &self.cr3
32    }
33    ///0x0c - Baud rate register
34    #[inline(always)]
35    pub const fn brr(&self) -> &BRR {
36        &self.brr
37    }
38    ///0x18 - Request register
39    #[inline(always)]
40    pub const fn rqr(&self) -> &RQR {
41        &self.rqr
42    }
43    ///0x1c - Interrupt & status register
44    #[inline(always)]
45    pub const fn isr(&self) -> &ISR {
46        &self.isr
47    }
48    ///0x20 - Interrupt flag clear register
49    #[inline(always)]
50    pub const fn icr(&self) -> &ICR {
51        &self.icr
52    }
53    ///0x24 - Receive data register
54    #[inline(always)]
55    pub const fn rdr(&self) -> &RDR {
56        &self.rdr
57    }
58    ///0x28 - Transmit data register
59    #[inline(always)]
60    pub const fn tdr(&self) -> &TDR {
61        &self.tdr
62    }
63    ///0x2c - Prescaler register
64    #[inline(always)]
65    pub const fn presc(&self) -> &PRESC {
66        &self.presc
67    }
68}
69/**CR1 (rw) register accessor: Control register 1
70
71You can [`read`](crate::Reg::read) this register and get [`cr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
72
73See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G041.html#LPUART:CR1)
74
75For information about available fields see [`mod@cr1`]
76module*/
77pub type CR1 = crate::Reg<cr1::CR1rs>;
78///Control register 1
79pub mod cr1;
80/**CR2 (rw) register accessor: Control register 2
81
82You can [`read`](crate::Reg::read) this register and get [`cr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
83
84See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G041.html#LPUART:CR2)
85
86For information about available fields see [`mod@cr2`]
87module*/
88pub type CR2 = crate::Reg<cr2::CR2rs>;
89///Control register 2
90pub mod cr2;
91/**CR3 (rw) register accessor: Control register 3
92
93You can [`read`](crate::Reg::read) this register and get [`cr3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
94
95See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G041.html#LPUART:CR3)
96
97For information about available fields see [`mod@cr3`]
98module*/
99pub type CR3 = crate::Reg<cr3::CR3rs>;
100///Control register 3
101pub mod cr3;
102/**BRR (rw) register accessor: Baud rate register
103
104You can [`read`](crate::Reg::read) this register and get [`brr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`brr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
105
106See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G041.html#LPUART:BRR)
107
108For information about available fields see [`mod@brr`]
109module*/
110pub type BRR = crate::Reg<brr::BRRrs>;
111///Baud rate register
112pub mod brr;
113/**RQR (w) register accessor: Request register
114
115You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rqr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
116
117See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G041.html#LPUART:RQR)
118
119For information about available fields see [`mod@rqr`]
120module*/
121pub type RQR = crate::Reg<rqr::RQRrs>;
122///Request register
123pub mod rqr;
124/**ISR (r) register accessor: Interrupt & status register
125
126You can [`read`](crate::Reg::read) this register and get [`isr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
127
128See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G041.html#LPUART:ISR)
129
130For information about available fields see [`mod@isr`]
131module*/
132pub type ISR = crate::Reg<isr::ISRrs>;
133///Interrupt & status register
134pub mod isr;
135/**ICR (w) register accessor: Interrupt flag clear register
136
137You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
138
139See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G041.html#LPUART:ICR)
140
141For information about available fields see [`mod@icr`]
142module*/
143pub type ICR = crate::Reg<icr::ICRrs>;
144///Interrupt flag clear register
145pub mod icr;
146/**RDR (r) register accessor: Receive data register
147
148You can [`read`](crate::Reg::read) this register and get [`rdr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
149
150See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G041.html#LPUART:RDR)
151
152For information about available fields see [`mod@rdr`]
153module*/
154pub type RDR = crate::Reg<rdr::RDRrs>;
155///Receive data register
156pub mod rdr;
157/**TDR (rw) register accessor: Transmit data register
158
159You can [`read`](crate::Reg::read) this register and get [`tdr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tdr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
160
161See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G041.html#LPUART:TDR)
162
163For information about available fields see [`mod@tdr`]
164module*/
165pub type TDR = crate::Reg<tdr::TDRrs>;
166///Transmit data register
167pub mod tdr;
168/**PRESC (rw) register accessor: Prescaler register
169
170You can [`read`](crate::Reg::read) this register and get [`presc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`presc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
171
172See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G041.html#LPUART:PRESC)
173
174For information about available fields see [`mod@presc`]
175module*/
176pub type PRESC = crate::Reg<presc::PRESCrs>;
177///Prescaler register
178pub mod presc;
stm32g0_staging/stm32g041/lpuart.rs

stm32g0_staging/stm32g041/
lpuart.rs
