stm32g0_staging/stm32g030/
dmamux.rs

1#[repr(C)]
2#[derive(Debug)]
3///Register block
4pub struct RegisterBlock {
5    ccr: [CCR; 7],
6    _reserved1: [u8; 0xe4],
7    rgcr: [RGCR; 4],
8    _reserved2: [u8; 0x30],
9    rgsr: RGSR,
10    rgcfr: RGCFR,
11}
12impl RegisterBlock {
13    ///0x00..0x1c - DMA Multiplexer Channel %s Control register
14    #[inline(always)]
15    pub const fn ccr(&self, n: usize) -> &CCR {
16        &self.ccr[n]
17    }
18    ///Iterator for array of:
19    ///0x00..0x1c - DMA Multiplexer Channel %s Control register
20    #[inline(always)]
21    pub fn ccr_iter(&self) -> impl Iterator<Item = &CCR> {
22        self.ccr.iter()
23    }
24    ///0x100..0x110 - DMAMux - DMA request generator channel x control register
25    #[inline(always)]
26    pub const fn rgcr(&self, n: usize) -> &RGCR {
27        &self.rgcr[n]
28    }
29    ///Iterator for array of:
30    ///0x100..0x110 - DMAMux - DMA request generator channel x control register
31    #[inline(always)]
32    pub fn rgcr_iter(&self) -> impl Iterator<Item = &RGCR> {
33        self.rgcr.iter()
34    }
35    ///0x140 - DMAMux - DMA request generator status register
36    #[inline(always)]
37    pub const fn rgsr(&self) -> &RGSR {
38        &self.rgsr
39    }
40    ///0x144 - DMAMux - DMA request generator clear flag register
41    #[inline(always)]
42    pub const fn rgcfr(&self) -> &RGCFR {
43        &self.rgcfr
44    }
45}
46/**CCR (rw) register accessor: DMA Multiplexer Channel %s Control register
47
48You can [`read`](crate::Reg::read) this register and get [`ccr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ccr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
49
50See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G030.html#DMAMUX:CCR[0])
51
52For information about available fields see [`mod@ccr`]
53module*/
54pub type CCR = crate::Reg<ccr::CCRrs>;
55///DMA Multiplexer Channel %s Control register
56pub mod ccr;
57/**RGCR (rw) register accessor: DMAMux - DMA request generator channel x control register
58
59You can [`read`](crate::Reg::read) this register and get [`rgcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rgcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
60
61See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G030.html#DMAMUX:RGCR[0])
62
63For information about available fields see [`mod@rgcr`]
64module*/
65pub type RGCR = crate::Reg<rgcr::RGCRrs>;
66///DMAMux - DMA request generator channel x control register
67pub mod rgcr;
68/**RGSR (r) register accessor: DMAMux - DMA request generator status register
69
70You can [`read`](crate::Reg::read) this register and get [`rgsr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
71
72See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G030.html#DMAMUX:RGSR)
73
74For information about available fields see [`mod@rgsr`]
75module*/
76pub type RGSR = crate::Reg<rgsr::RGSRrs>;
77///DMAMux - DMA request generator status register
78pub mod rgsr;
79/**RGCFR (w) register accessor: DMAMux - DMA request generator clear flag register
80
81You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rgcfr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
82
83See register [structure](https://stm32-rs.github.io/stm32-rs/STM32G030.html#DMAMUX:RGCFR)
84
85For information about available fields see [`mod@rgcfr`]
86module*/
87pub type RGCFR = crate::Reg<rgcfr::RGCFRrs>;
88///DMAMux - DMA request generator clear flag register
89pub mod rgcfr;
stm32g0_staging/stm32g030/dmamux.rs

stm32g0_staging/stm32g030/
dmamux.rs
