1use crate::pac::DAC;
4use crate::{
5 gpio::{
6 gpioa::{PA4, PA5},
7 Analog,
8 },
9 rcc::{Enable, Reset},
10};
11
12#[derive(Debug)]
14pub enum Error {
15 error,
17}
18
19use core::mem;
20
21pub struct C1;
22pub struct C2;
23
24pub trait DacOut<V> {
25 fn set_value(&mut self, val: V);
26 fn get_value(&mut self) -> V;
27}
28
29pub trait DacPin {
30 fn enable(&mut self);
31}
32
33pub trait Pins<DAC> {
34 type Output;
35}
36
37impl Pins<DAC> for PA4<Analog> {
38 type Output = C1;
39}
40
41impl Pins<DAC> for PA5<Analog> {
42 type Output = C2;
43}
44
45impl Pins<DAC> for (PA4<Analog>, PA5<Analog>) {
46 type Output = (C1, C2);
47}
48
49pub fn dac<PINS>(_dac: DAC, _pins: PINS) -> PINS::Output
50where
51 PINS: Pins<DAC>,
52{
53 unsafe {
54 DAC::enable_unchecked();
55 DAC::reset_unchecked();
56
57 assert!(mem::size_of::<PINS::Output>() == 0);
59 #[allow(clippy::uninit_assumed_init)]
60 mem::MaybeUninit::uninit().assume_init()
61 }
62}
63
64macro_rules! dac {
65 ($CX:ident, $en:ident, $cen:ident, $cal_flag:ident, $trim:ident, $mode:ident, $dhrx:ident, $dac_dor:ident, $daccxdhr:ident) => {
66 impl DacPin for $CX {
67 fn enable(&mut self) {
68 let dac = unsafe { &(*DAC::ptr()) };
69 dac.cr.modify(|_, w| w.$en().set_bit());
70 }
71 }
72
73 impl DacOut<u16> for $CX {
74 fn set_value(&mut self, val: u16) {
75 let dac = unsafe { &(*DAC::ptr()) };
76 dac.$dhrx.write(|w| unsafe { w.bits(val as u32) });
77 }
78
79 fn get_value(&mut self) -> u16 {
80 let dac = unsafe { &(*DAC::ptr()) };
81 dac.$dac_dor.read().bits() as u16
82 }
83 }
84 };
85}
86
87pub trait DacExt {
88 fn constrain<PINS>(self, pins: PINS) -> PINS::Output
89 where
90 PINS: Pins<DAC>;
91}
92
93impl DacExt for DAC {
94 fn constrain<PINS>(self, pins: PINS) -> PINS::Output
95 where
96 PINS: Pins<DAC>,
97 {
98 dac(self, pins)
99 }
100}
101
102dac!(C1, en1, cen1, cal_flag1, otrim1, mode1, dhr12r1, dor1, dacc1dhr);
103dac!(C2, en2, cen2, cal_flag2, otrim2, mode2, dhr12r2, dor2, dacc2dhr);