Struct stm32f7xx_hal::pac::ethernet_mmc::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {
pub mmccr: Reg<u32, _MMCCR>,
pub mmcrir: Reg<u32, _MMCRIR>,
pub mmctir: Reg<u32, _MMCTIR>,
pub mmcrimr: Reg<u32, _MMCRIMR>,
pub mmctimr: Reg<u32, _MMCTIMR>,
pub mmctgfsccr: Reg<u32, _MMCTGFSCCR>,
pub mmctgfmsccr: Reg<u32, _MMCTGFMSCCR>,
pub mmctgfcr: Reg<u32, _MMCTGFCR>,
pub mmcrfcecr: Reg<u32, _MMCRFCECR>,
pub mmcrfaecr: Reg<u32, _MMCRFAECR>,
pub mmcrgufcr: Reg<u32, _MMCRGUFCR>,
// some fields omitted
}
Expand description
Register block
Fields
mmccr: Reg<u32, _MMCCR>
0x00 - Ethernet MMC control register
mmcrir: Reg<u32, _MMCRIR>
0x04 - Ethernet MMC receive interrupt register
mmctir: Reg<u32, _MMCTIR>
0x08 - Ethernet MMC transmit interrupt register
mmcrimr: Reg<u32, _MMCRIMR>
0x0c - Ethernet MMC receive interrupt mask register
mmctimr: Reg<u32, _MMCTIMR>
0x10 - Ethernet MMC transmit interrupt mask register
mmctgfsccr: Reg<u32, _MMCTGFSCCR>
0x4c - Ethernet MMC transmitted good frames after a single collision counter
mmctgfmsccr: Reg<u32, _MMCTGFMSCCR>
0x50 - Ethernet MMC transmitted good frames after more than a single collision
mmctgfcr: Reg<u32, _MMCTGFCR>
0x68 - Ethernet MMC transmitted good frames counter register
mmcrfcecr: Reg<u32, _MMCRFCECR>
0x94 - Ethernet MMC received frames with CRC error counter register
mmcrfaecr: Reg<u32, _MMCRFAECR>
0x98 - Ethernet MMC received frames with alignment error counter register
mmcrgufcr: Reg<u32, _MMCRGUFCR>
0xc4 - MMC received good unicast frames counter register