Struct stm32f7xx_hal::pac::otg_hs_global::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {Show 20 fields
pub otg_hs_gotgctl: Reg<u32, _OTG_HS_GOTGCTL>,
pub otg_hs_gotgint: Reg<u32, _OTG_HS_GOTGINT>,
pub otg_hs_gahbcfg: Reg<u32, _OTG_HS_GAHBCFG>,
pub otg_hs_gusbcfg: Reg<u32, _OTG_HS_GUSBCFG>,
pub otg_hs_grstctl: Reg<u32, _OTG_HS_GRSTCTL>,
pub otg_hs_gintsts: Reg<u32, _OTG_HS_GINTSTS>,
pub otg_hs_gintmsk: Reg<u32, _OTG_HS_GINTMSK>,
pub otg_hs_grxfsiz: Reg<u32, _OTG_HS_GRXFSIZ>,
pub otg_hs_gnptxsts: Reg<u32, _OTG_HS_GNPTXSTS>,
pub otg_hs_gccfg: Reg<u32, _OTG_HS_GCCFG>,
pub otg_hs_cid: Reg<u32, _OTG_HS_CID>,
pub otg_hs_glpmcfg: Reg<u32, _OTG_HS_GLPMCFG>,
pub otg_hs_hptxfsiz: Reg<u32, _OTG_HS_HPTXFSIZ>,
pub otg_hs_dieptxf1: Reg<u32, _OTG_HS_DIEPTXF1>,
pub otg_hs_dieptxf2: Reg<u32, _OTG_HS_DIEPTXF2>,
pub otg_hs_dieptxf3: Reg<u32, _OTG_HS_DIEPTXF3>,
pub otg_hs_dieptxf4: Reg<u32, _OTG_HS_DIEPTXF4>,
pub otg_hs_dieptxf5: Reg<u32, _OTG_HS_DIEPTXF5>,
pub otg_hs_dieptxf6: Reg<u32, _OTG_HS_DIEPTXF6>,
pub otg_hs_dieptxf7: Reg<u32, _OTG_HS_DIEPTXF7>,
// some fields omitted
}
Expand description
Register block
Fields
otg_hs_gotgctl: Reg<u32, _OTG_HS_GOTGCTL>
0x00 - OTG_HS control and status register
otg_hs_gotgint: Reg<u32, _OTG_HS_GOTGINT>
0x04 - OTG_HS interrupt register
otg_hs_gahbcfg: Reg<u32, _OTG_HS_GAHBCFG>
0x08 - OTG_HS AHB configuration register
otg_hs_gusbcfg: Reg<u32, _OTG_HS_GUSBCFG>
0x0c - OTG_HS USB configuration register
otg_hs_grstctl: Reg<u32, _OTG_HS_GRSTCTL>
0x10 - OTG_HS reset register
otg_hs_gintsts: Reg<u32, _OTG_HS_GINTSTS>
0x14 - OTG_HS core interrupt register
otg_hs_gintmsk: Reg<u32, _OTG_HS_GINTMSK>
0x18 - OTG_HS interrupt mask register
otg_hs_grxfsiz: Reg<u32, _OTG_HS_GRXFSIZ>
0x24 - OTG_HS Receive FIFO size register
otg_hs_gnptxsts: Reg<u32, _OTG_HS_GNPTXSTS>
0x2c - OTG_HS nonperiodic transmit FIFO/queue status register
otg_hs_gccfg: Reg<u32, _OTG_HS_GCCFG>
0x38 - OTG_HS general core configuration register
otg_hs_cid: Reg<u32, _OTG_HS_CID>
0x3c - OTG_HS core ID register
otg_hs_glpmcfg: Reg<u32, _OTG_HS_GLPMCFG>
0x54 - OTG core LPM configuration register
otg_hs_hptxfsiz: Reg<u32, _OTG_HS_HPTXFSIZ>
0x100 - OTG_HS Host periodic transmit FIFO size register
otg_hs_dieptxf1: Reg<u32, _OTG_HS_DIEPTXF1>
0x104 - OTG_HS device IN endpoint transmit FIFO size register
otg_hs_dieptxf2: Reg<u32, _OTG_HS_DIEPTXF2>
0x108 - OTG_HS device IN endpoint transmit FIFO size register
otg_hs_dieptxf3: Reg<u32, _OTG_HS_DIEPTXF3>
0x11c - OTG_HS device IN endpoint transmit FIFO size register
otg_hs_dieptxf4: Reg<u32, _OTG_HS_DIEPTXF4>
0x120 - OTG_HS device IN endpoint transmit FIFO size register
otg_hs_dieptxf5: Reg<u32, _OTG_HS_DIEPTXF5>
0x124 - OTG_HS device IN endpoint transmit FIFO size register
otg_hs_dieptxf6: Reg<u32, _OTG_HS_DIEPTXF6>
0x128 - OTG_HS device IN endpoint transmit FIFO size register
otg_hs_dieptxf7: Reg<u32, _OTG_HS_DIEPTXF7>
0x12c - OTG_HS device IN endpoint transmit FIFO size register
Implementations
0x1c - OTG_HS Receive status debug read register (peripheral mode mode)
0x1c - OTG_HS Receive status debug read register (peripheral mode mode)
0x1c - OTG_HS Receive status debug read register (host mode)
0x1c - OTG_HS Receive status debug read register (host mode)
0x20 - OTG_HS status read and pop register (peripheral mode)
0x20 - OTG_HS status read and pop register (peripheral mode)
0x20 - OTG_HS status read and pop register (host mode)
0x20 - OTG_HS status read and pop register (host mode)
0x28 - Endpoint 0 transmit FIFO size (peripheral mode)
0x28 - Endpoint 0 transmit FIFO size (peripheral mode)
0x28 - OTG_HS nonperiodic transmit FIFO size register (host mode)
0x28 - OTG_HS nonperiodic transmit FIFO size register (host mode)