Struct stm32f7xx_hal::pac::fmc::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {Show 24 fields
pub bcr1: Reg<u32, _BCR1>,
pub btr1: Reg<u32, _BTR>,
pub bcr2: Reg<u32, _BCR>,
pub btr2: Reg<u32, _BTR>,
pub bcr3: Reg<u32, _BCR>,
pub btr3: Reg<u32, _BTR>,
pub bcr4: Reg<u32, _BCR>,
pub btr4: Reg<u32, _BTR>,
pub pcr: Reg<u32, _PCR>,
pub sr: Reg<u32, _SR>,
pub pmem: Reg<u32, _PMEM>,
pub patt: Reg<u32, _PATT>,
pub eccr: Reg<u32, _ECCR>,
pub bwtr1: Reg<u32, _BWTR>,
pub bwtr2: Reg<u32, _BWTR>,
pub bwtr3: Reg<u32, _BWTR>,
pub bwtr4: Reg<u32, _BWTR>,
pub sdcr1: Reg<u32, _SDCR>,
pub sdcr2: Reg<u32, _SDCR>,
pub sdtr1: Reg<u32, _SDTR>,
pub sdtr2: Reg<u32, _SDTR>,
pub sdcmr: Reg<u32, _SDCMR>,
pub sdrtr: Reg<u32, _SDRTR>,
pub sdsr: Reg<u32, _SDSR>,
// some fields omitted
}
Expand description
Register block
Fields
bcr1: Reg<u32, _BCR1>
0x00 - SRAM/NOR-Flash chip-select control register 1
btr1: Reg<u32, _BTR>
0x04 - SRAM/NOR-Flash chip-select timing register 1
bcr2: Reg<u32, _BCR>
0x08 - SRAM/NOR-Flash chip-select control register 2
btr2: Reg<u32, _BTR>
0x0c - SRAM/NOR-Flash chip-select timing register 1
bcr3: Reg<u32, _BCR>
0x10 - SRAM/NOR-Flash chip-select control register 2
btr3: Reg<u32, _BTR>
0x14 - SRAM/NOR-Flash chip-select timing register 1
bcr4: Reg<u32, _BCR>
0x18 - SRAM/NOR-Flash chip-select control register 2
btr4: Reg<u32, _BTR>
0x1c - SRAM/NOR-Flash chip-select timing register 1
pcr: Reg<u32, _PCR>
0x80 - PC Card/NAND Flash control register
sr: Reg<u32, _SR>
0x84 - FIFO status and interrupt register
pmem: Reg<u32, _PMEM>
0x88 - Common memory space timing register
patt: Reg<u32, _PATT>
0x8c - Attribute memory space timing register
eccr: Reg<u32, _ECCR>
0x94 - ECC result register
bwtr1: Reg<u32, _BWTR>
0x104 - SRAM/NOR-Flash write timing registers 1
bwtr2: Reg<u32, _BWTR>
0x10c - SRAM/NOR-Flash write timing registers 1
bwtr3: Reg<u32, _BWTR>
0x114 - SRAM/NOR-Flash write timing registers 1
bwtr4: Reg<u32, _BWTR>
0x11c - SRAM/NOR-Flash write timing registers 1
sdcr1: Reg<u32, _SDCR>
0x140 - SDRAM Control Register 1
sdcr2: Reg<u32, _SDCR>
0x144 - SDRAM Control Register 1
sdtr1: Reg<u32, _SDTR>
0x148 - SDRAM Timing register 1
sdtr2: Reg<u32, _SDTR>
0x14c - SDRAM Timing register 1
sdcmr: Reg<u32, _SDCMR>
0x150 - SDRAM Command Mode register
sdrtr: Reg<u32, _SDRTR>
0x154 - SDRAM Refresh Timer register
sdsr: Reg<u32, _SDSR>
0x158 - SDRAM Status register