Struct stm32f7x7::cryp::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub cr: CR,
    pub sr: SR,
    pub din: DIN,
    pub dout: DOUT,
    pub dmacr: DMACR,
    pub imscr: IMSCR,
    pub risr: RISR,
    pub misr: MISR,
    pub k0lr: K0LR,
    pub k0rr: K0RR,
    pub k1lr: K1LR,
    pub k1rr: K1RR,
    pub k2lr: K2LR,
    pub k2rr: K2RR,
    pub k3lr: K3LR,
    pub k3rr: K3RR,
    pub iv0lr: IV0LR,
    pub iv0rr: IV0RR,
    pub iv1lr: IV1LR,
    pub iv1rr: IV1RR,
    pub csgcmccm0r: CSGCMCCM0R,
    pub csgcmccm1r: CSGCMCCM1R,
    pub csgcmccm2r: CSGCMCCM2R,
    pub csgcmccm3r: CSGCMCCM3R,
    pub csgcmccm4r: CSGCMCCM4R,
    pub csgcmccm5r: CSGCMCCM5R,
    pub csgcmccm6r: CSGCMCCM6R,
    pub csgcmccm7r: CSGCMCCM7R,
    pub csgcm0r: CSGCM0R,
    pub csgcm1r: CSGCM1R,
    pub csgcm2r: CSGCM2R,
    pub csgcm3r: CSGCM3R,
    pub csgcm4r: CSGCM4R,
    pub csgcm5r: CSGCM5R,
    pub csgcm6r: CSGCM6R,
    pub csgcm7r: CSGCM7R,
}

Register block

Fields

cr: CR

0x00 - control register

sr: SR

0x04 - status register

din: DIN

0x08 - data input register

dout: DOUT

0x0c - data output register

dmacr: DMACR

0x10 - DMA control register

imscr: IMSCR

0x14 - interrupt mask set/clear register

risr: RISR

0x18 - raw interrupt status register

misr: MISR

0x1c - masked interrupt status register

k0lr: K0LR

0x20 - key registers

k0rr: K0RR

0x24 - key registers

k1lr: K1LR

0x28 - key registers

k1rr: K1RR

0x2c - key registers

k2lr: K2LR

0x30 - key registers

k2rr: K2RR

0x34 - key registers

k3lr: K3LR

0x38 - key registers

k3rr: K3RR

0x3c - key registers

iv0lr: IV0LR

0x40 - initialization vector registers

iv0rr: IV0RR

0x44 - initialization vector registers

iv1lr: IV1LR

0x48 - initialization vector registers

iv1rr: IV1RR

0x4c - initialization vector registers

csgcmccm0r: CSGCMCCM0R

0x50 - context swap register

csgcmccm1r: CSGCMCCM1R

0x54 - context swap register

csgcmccm2r: CSGCMCCM2R

0x58 - context swap register

csgcmccm3r: CSGCMCCM3R

0x5c - context swap register

csgcmccm4r: CSGCMCCM4R

0x60 - context swap register

csgcmccm5r: CSGCMCCM5R

0x64 - context swap register

csgcmccm6r: CSGCMCCM6R

0x68 - context swap register

csgcmccm7r: CSGCMCCM7R

0x6c - context swap register

csgcm0r: CSGCM0R

0x70 - context swap register

csgcm1r: CSGCM1R

0x74 - context swap register

csgcm2r: CSGCM2R

0x78 - context swap register

csgcm3r: CSGCM3R

0x7c - context swap register

csgcm4r: CSGCM4R

0x80 - context swap register

csgcm5r: CSGCM5R

0x84 - context swap register

csgcm6r: CSGCM6R

0x88 - context swap register

csgcm7r: CSGCM7R

0x8c - context swap register

Trait Implementations