Struct stm32f7x7::dma2d::RegisterBlock
[−]
[src]
#[repr(C)]pub struct RegisterBlock { pub cr: CR, pub isr: ISR, pub ifcr: IFCR, pub fgmar: FGMAR, pub fgor: FGOR, pub bgmar: BGMAR, pub bgor: BGOR, pub fgpfccr: FGPFCCR, pub fgcolr: FGCOLR, pub bgpfccr: BGPFCCR, pub bgcolr: BGCOLR, pub fgcmar: FGCMAR, pub bgcmar: BGCMAR, pub opfccr: OPFCCR, pub ocolr: OCOLR, pub omar: OMAR, pub oor: OOR, pub nlr: NLR, pub lwr: LWR, pub amtcr: AMTCR, pub fgclut: FGCLUT, pub bgclut: BGCLUT, // some fields omitted }
Register block
Fields
cr: CR
0x00 - control register
isr: ISR
0x04 - Interrupt Status Register
ifcr: IFCR
0x08 - interrupt flag clear register
fgmar: FGMAR
0x0c - foreground memory address register
fgor: FGOR
0x10 - foreground offset register
bgmar: BGMAR
0x14 - background memory address register
bgor: BGOR
0x18 - background offset register
fgpfccr: FGPFCCR
0x1c - foreground PFC control register
fgcolr: FGCOLR
0x20 - foreground color register
bgpfccr: BGPFCCR
0x24 - background PFC control register
bgcolr: BGCOLR
0x28 - background color register
fgcmar: FGCMAR
0x2c - foreground CLUT memory address register
bgcmar: BGCMAR
0x30 - background CLUT memory address register
opfccr: OPFCCR
0x34 - output PFC control register
ocolr: OCOLR
0x38 - output color register
omar: OMAR
0x3c - output memory address register
oor: OOR
0x40 - output offset register
nlr: NLR
0x44 - number of line register
lwr: LWR
0x48 - line watermark register
amtcr: AMTCR
0x4c - AHB master timer configuration register
fgclut: FGCLUT
0x400 - FGCLUT
bgclut: BGCLUT
0x800 - BGCLUT