Module dma2

Source
Expand description

DMA controller

Modules§

hifcr
high interrupt flag clear register
hisr
high interrupt status register
lifcr
low interrupt flag clear register
lisr
low interrupt status register
st
Register block Stream cluster: S?CR, S?NDTR, S?PAR, S?M0AR, S?M1AR and S?FCR registers

Structs§

HIFCR
high interrupt flag clear register
HISR
high interrupt status register
LIFCR
low interrupt flag clear register
LISR
low interrupt status register
RegisterBlock
Register block
ST
Register block