Struct stm32f7x6::otg_hs_device::RegisterBlock [−] [src]

#[repr(C)]

pub struct RegisterBlock {
    pub otg_hs_dcfg: OTG_HS_DCFG,
    pub otg_hs_dctl: OTG_HS_DCTL,
    pub otg_hs_dsts: OTG_HS_DSTS,
    pub otg_hs_diepmsk: OTG_HS_DIEPMSK,
    pub otg_hs_doepmsk: OTG_HS_DOEPMSK,
    pub otg_hs_daint: OTG_HS_DAINT,
    pub otg_hs_daintmsk: OTG_HS_DAINTMSK,
    pub otg_hs_dvbusdis: OTG_HS_DVBUSDIS,
    pub otg_hs_dvbuspulse: OTG_HS_DVBUSPULSE,
    pub otg_hs_dthrctl: OTG_HS_DTHRCTL,
    pub otg_hs_diepempmsk: OTG_HS_DIEPEMPMSK,
    pub otg_hs_deachint: OTG_HS_DEACHINT,
    pub otg_hs_deachintmsk: OTG_HS_DEACHINTMSK,
    pub otg_hs_diepctl0: OTG_HS_DIEPCTL0,
    pub otg_hs_diepint0: OTG_HS_DIEPINT0,
    pub otg_hs_dieptsiz0: OTG_HS_DIEPTSIZ0,
    pub otg_hs_diepdma1: OTG_HS_DIEPDMA1,
    pub otg_hs_dtxfsts0: OTG_HS_DTXFSTS0,
    pub otg_hs_diepctl1: OTG_HS_DIEPCTL1,
    pub otg_hs_diepint1: OTG_HS_DIEPINT1,
    pub otg_hs_dieptsiz1: OTG_HS_DIEPTSIZ1,
    pub otg_hs_diepdma2: OTG_HS_DIEPDMA2,
    pub otg_hs_dtxfsts1: OTG_HS_DTXFSTS1,
    pub otg_hs_diepctl2: OTG_HS_DIEPCTL2,
    pub otg_hs_diepint2: OTG_HS_DIEPINT2,
    pub otg_hs_dieptsiz2: OTG_HS_DIEPTSIZ2,
    pub otg_hs_diepdma3: OTG_HS_DIEPDMA3,
    pub otg_hs_dtxfsts2: OTG_HS_DTXFSTS2,
    pub otg_hs_diepctl3: OTG_HS_DIEPCTL3,
    pub otg_hs_diepint3: OTG_HS_DIEPINT3,
    pub otg_hs_dieptsiz3: OTG_HS_DIEPTSIZ3,
    pub otg_hs_diepdma4: OTG_HS_DIEPDMA4,
    pub otg_hs_dtxfsts3: OTG_HS_DTXFSTS3,
    pub otg_hs_diepctl4: OTG_HS_DIEPCTL4,
    pub otg_hs_diepint4: OTG_HS_DIEPINT4,
    pub otg_hs_dieptsiz4: OTG_HS_DIEPTSIZ4,
    pub otg_hs_diepdma5: OTG_HS_DIEPDMA5,
    pub otg_hs_dtxfsts4: OTG_HS_DTXFSTS4,
    pub otg_hs_diepctl5: OTG_HS_DIEPCTL5,
    pub otg_hs_dtxfsts6: OTG_HS_DTXFSTS6,
    pub otg_hs_diepint5: OTG_HS_DIEPINT5,
    pub otg_hs_dtxfsts7: OTG_HS_DTXFSTS7,
    pub otg_hs_dieptsiz5: OTG_HS_DIEPTSIZ5,
    pub otg_hs_dtxfsts5: OTG_HS_DTXFSTS5,
    pub otg_hs_diepctl6: OTG_HS_DIEPCTL6,
    pub otg_hs_diepint6: OTG_HS_DIEPINT6,
    pub otg_hs_diepctl7: OTG_HS_DIEPCTL7,
    pub otg_hs_diepint7: OTG_HS_DIEPINT7,
    pub otg_hs_doepctl0: OTG_HS_DOEPCTL0,
    pub otg_hs_doepint0: OTG_HS_DOEPINT0,
    pub otg_hs_doeptsiz0: OTG_HS_DOEPTSIZ0,
    pub otg_hs_doepctl1: OTG_HS_DOEPCTL1,
    pub otg_hs_doepint1: OTG_HS_DOEPINT1,
    pub otg_hs_doeptsiz1: OTG_HS_DOEPTSIZ1,
    pub otg_hs_doepctl2: OTG_HS_DOEPCTL2,
    pub otg_hs_doepint2: OTG_HS_DOEPINT2,
    pub otg_hs_doeptsiz2: OTG_HS_DOEPTSIZ2,
    pub otg_hs_doepctl3: OTG_HS_DOEPCTL3,
    pub otg_hs_doepint3: OTG_HS_DOEPINT3,
    pub otg_hs_doeptsiz3: OTG_HS_DOEPTSIZ3,
    pub otg_hs_doepctl4: OTG_HS_DOEPCTL4,
    pub otg_hs_doepint4: OTG_HS_DOEPINT4,
    pub otg_hs_doeptsiz4: OTG_HS_DOEPTSIZ4,
    pub otg_hs_doepctl5: OTG_HS_DOEPCTL5,
    pub otg_hs_doepint5: OTG_HS_DOEPINT5,
    pub otg_hs_doeptsiz5: OTG_HS_DOEPTSIZ5,
    pub otg_hs_doepctl6: OTG_HS_DOEPCTL6,
    pub otg_hs_doepint6: OTG_HS_DOEPINT6,
    pub otg_hs_doeptsiz6: OTG_HS_DOEPTSIZ6,
    pub otg_hs_doepctl7: OTG_HS_DOEPCTL7,
    pub otg_hs_doepint7: OTG_HS_DOEPINT7,
    pub otg_hs_doeptsiz7: OTG_HS_DOEPTSIZ7,
    // some fields omitted
}

Register block

Fields

0x00 - OTG_HS device configuration register

0x04 - OTG_HS device control register

0x08 - OTG_HS device status register

0x10 - OTG_HS device IN endpoint common interrupt mask register

0x14 - OTG_HS device OUT endpoint common interrupt mask register

0x18 - OTG_HS device all endpoints interrupt register

0x1c - OTG_HS all endpoints interrupt mask register

0x28 - OTG_HS device VBUS discharge time register

0x2c - OTG_HS device VBUS pulsing time register

0x30 - OTG_HS Device threshold control register

0x34 - OTG_HS device IN endpoint FIFO empty interrupt mask register

0x38 - OTG_HS device each endpoint interrupt register

0x3c - OTG_HS device each endpoint interrupt register mask

0x100 - OTG device endpoint-0 control register

0x108 - OTG device endpoint-0 interrupt register

0x110 - OTG_HS device IN endpoint 0 transfer size register

0x114 - OTG_HS device endpoint-1 DMA address register

0x118 - OTG_HS device IN endpoint transmit FIFO status register

0x120 - OTG device endpoint-1 control register

0x128 - OTG device endpoint-1 interrupt register

0x130 - OTG_HS device endpoint transfer size register

0x134 - OTG_HS device endpoint-2 DMA address register

0x138 - OTG_HS device IN endpoint transmit FIFO status register

0x140 - OTG device endpoint-2 control register

0x148 - OTG device endpoint-2 interrupt register

0x150 - OTG_HS device endpoint transfer size register

0x154 - OTG_HS device endpoint-3 DMA address register

0x158 - OTG_HS device IN endpoint transmit FIFO status register

0x160 - OTG device endpoint-3 control register

0x168 - OTG device endpoint-3 interrupt register

0x170 - OTG_HS device endpoint transfer size register

0x174 - OTG_HS device endpoint-4 DMA address register

0x178 - OTG_HS device IN endpoint transmit FIFO status register

0x180 - OTG device endpoint-4 control register

0x188 - OTG device endpoint-4 interrupt register

0x190 - OTG_HS device endpoint transfer size register

0x194 - OTG_HS device endpoint-5 DMA address register

0x198 - OTG_HS device IN endpoint transmit FIFO status register

0x1a0 - OTG device endpoint-5 control register

0x1a4 - OTG_HS device IN endpoint transmit FIFO status register

0x1a8 - OTG device endpoint-5 interrupt register

0x1ac - OTG_HS device IN endpoint transmit FIFO status register

0x1b0 - OTG_HS device endpoint transfer size register

0x1b8 - OTG_HS device IN endpoint transmit FIFO status register

0x1c0 - OTG device endpoint-6 control register

0x1c8 - OTG device endpoint-6 interrupt register

0x1e0 - OTG device endpoint-7 control register

0x1e8 - OTG device endpoint-7 interrupt register

0x300 - OTG_HS device control OUT endpoint 0 control register

0x308 - OTG_HS device endpoint-0 interrupt register

0x310 - OTG_HS device endpoint-0 transfer size register

0x320 - OTG device endpoint-1 control register

0x328 - OTG_HS device endpoint-1 interrupt register

0x330 - OTG_HS device endpoint-1 transfer size register

0x340 - OTG device endpoint-2 control register

0x348 - OTG_HS device endpoint-2 interrupt register

0x350 - OTG_HS device endpoint-2 transfer size register

0x360 - OTG device endpoint-3 control register

0x368 - OTG_HS device endpoint-3 interrupt register

0x370 - OTG_HS device endpoint-3 transfer size register

0x380 - OTG device endpoint-4 control register

0x388 - OTG_HS device endpoint-4 interrupt register

0x390 - OTG_HS device endpoint-4 transfer size register

0x3a0 - OTG device endpoint-5 control register

0x3a8 - OTG_HS device endpoint-5 interrupt register

0x3b0 - OTG_HS device endpoint-5 transfer size register

0x3c0 - OTG device endpoint-6 control register

0x3c8 - OTG_HS device endpoint-6 interrupt register

0x3d0 - OTG_HS device endpoint-6 transfer size register

0x3e0 - OTG device endpoint-7 control register

0x3e8 - OTG_HS device endpoint-7 interrupt register

0x3f0 - OTG_HS device endpoint-7 transfer size register

Trait Implementations

Auto Trait Implementations

impl Send for RegisterBlock

impl !Sync for RegisterBlock