Struct stm32f7x2::can1::RegisterBlock [−] [src]

#[repr(C)]

pub struct RegisterBlock {
    pub mcr: MCR,
    pub msr: MSR,
    pub tsr: TSR,
    pub rf0r: RF0R,
    pub rf1r: RF1R,
    pub ier: IER,
    pub esr: ESR,
    pub btr: BTR,
    pub ti0r: TI0R,
    pub tdt0r: TDT0R,
    pub tdl0r: TDL0R,
    pub tdh0r: TDH0R,
    pub ti1r: TI1R,
    pub tdt1r: TDT1R,
    pub tdl1r: TDL1R,
    pub tdh1r: TDH1R,
    pub ti2r: TI2R,
    pub tdt2r: TDT2R,
    pub tdl2r: TDL2R,
    pub tdh2r: TDH2R,
    pub ri0r: RI0R,
    pub rdt0r: RDT0R,
    pub rdl0r: RDL0R,
    pub rdh0r: RDH0R,
    pub ri1r: RI1R,
    pub rdt1r: RDT1R,
    pub rdl1r: RDL1R,
    pub rdh1r: RDH1R,
    pub fmr: FMR,
    pub fm1r: FM1R,
    pub fs1r: FS1R,
    pub ffa1r: FFA1R,
    pub fa1r: FA1R,
    pub f0r1: F0R1,
    pub f0r2: F0R2,
    pub f1r1: F1R1,
    pub f1r2: F1R2,
    pub f2r1: F2R1,
    pub f2r2: F2R2,
    pub f3r1: F3R1,
    pub f3r2: F3R2,
    pub f4r1: F4R1,
    pub f4r2: F4R2,
    pub f5r1: F5R1,
    pub f5r2: F5R2,
    pub f6r1: F6R1,
    pub f6r2: F6R2,
    pub f7r1: F7R1,
    pub f7r2: F7R2,
    pub f8r1: F8R1,
    pub f8r2: F8R2,
    pub f9r1: F9R1,
    pub f9r2: F9R2,
    pub f10r1: F10R1,
    pub f10r2: F10R2,
    pub f11r1: F11R1,
    pub f11r2: F11R2,
    pub f12r1: F12R1,
    pub f12r2: F12R2,
    pub f13r1: F13R1,
    pub f13r2: F13R2,
    pub f14r1: F14R1,
    pub f14r2: F14R2,
    pub f15r1: F15R1,
    pub f15r2: F15R2,
    pub f16r1: F16R1,
    pub f16r2: F16R2,
    pub f17r1: F17R1,
    pub f17r2: F17R2,
    pub f18r1: F18R1,
    pub f18r2: F18R2,
    pub f19r1: F19R1,
    pub f19r2: F19R2,
    pub f20r1: F20R1,
    pub f20r2: F20R2,
    pub f21r1: F21R1,
    pub f21r2: F21R2,
    pub f22r1: F22R1,
    pub f22r2: F22R2,
    pub f23r1: F23R1,
    pub f23r2: F23R2,
    pub f24r1: F24R1,
    pub f24r2: F24R2,
    pub f25r1: F25R1,
    pub f25r2: F25R2,
    pub f26r1: F26R1,
    pub f26r2: F26R2,
    pub f27r1: F27R1,
    pub f27r2: F27R2,
    // some fields omitted
}

Register block

Fields

0x00 - master control register

0x04 - master status register

0x08 - transmit status register

0x0c - receive FIFO 0 register

0x10 - receive FIFO 1 register

0x14 - interrupt enable register

0x18 - interrupt enable register

0x1c - bit timing register

0x180 - TX mailbox identifier register

0x184 - mailbox data length control and time stamp register

0x188 - mailbox data low register

0x18c - mailbox data high register

0x190 - mailbox identifier register

0x194 - mailbox data length control and time stamp register

0x198 - mailbox data low register

0x19c - mailbox data high register

0x1a0 - mailbox identifier register

0x1a4 - mailbox data length control and time stamp register

0x1a8 - mailbox data low register

0x1ac - mailbox data high register

0x1b0 - receive FIFO mailbox identifier register

0x1b4 - mailbox data high register

0x1b8 - mailbox data high register

0x1bc - receive FIFO mailbox data high register

0x1c0 - mailbox data high register

0x1c4 - mailbox data high register

0x1c8 - mailbox data high register

0x1cc - mailbox data high register

0x200 - filter master register

0x204 - filter mode register

0x20c - filter scale register

0x214 - filter FIFO assignment register

0x21c - filter activation register

0x240 - Filter bank 0 register 1

0x244 - Filter bank 0 register 2

0x248 - Filter bank 1 register 1

0x24c - Filter bank 1 register 2

0x250 - Filter bank 2 register 1

0x254 - Filter bank 2 register 2

0x258 - Filter bank 3 register 1

0x25c - Filter bank 3 register 2

0x260 - Filter bank 4 register 1

0x264 - Filter bank 4 register 2

0x268 - Filter bank 5 register 1

0x26c - Filter bank 5 register 2

0x270 - Filter bank 6 register 1

0x274 - Filter bank 6 register 2

0x278 - Filter bank 7 register 1

0x27c - Filter bank 7 register 2

0x280 - Filter bank 8 register 1

0x284 - Filter bank 8 register 2

0x288 - Filter bank 9 register 1

0x28c - Filter bank 9 register 2

0x290 - Filter bank 10 register 1

0x294 - Filter bank 10 register 2

0x298 - Filter bank 11 register 1

0x29c - Filter bank 11 register 2

0x2a0 - Filter bank 4 register 1

0x2a4 - Filter bank 12 register 2

0x2a8 - Filter bank 13 register 1

0x2ac - Filter bank 13 register 2

0x2b0 - Filter bank 14 register 1

0x2b4 - Filter bank 14 register 2

0x2b8 - Filter bank 15 register 1

0x2bc - Filter bank 15 register 2

0x2c0 - Filter bank 16 register 1

0x2c4 - Filter bank 16 register 2

0x2c8 - Filter bank 17 register 1

0x2cc - Filter bank 17 register 2

0x2d0 - Filter bank 18 register 1

0x2d4 - Filter bank 18 register 2

0x2d8 - Filter bank 19 register 1

0x2dc - Filter bank 19 register 2

0x2e0 - Filter bank 20 register 1

0x2e4 - Filter bank 20 register 2

0x2e8 - Filter bank 21 register 1

0x2ec - Filter bank 21 register 2

0x2f0 - Filter bank 22 register 1

0x2f4 - Filter bank 22 register 2

0x2f8 - Filter bank 23 register 1

0x2fc - Filter bank 23 register 2

0x300 - Filter bank 24 register 1

0x304 - Filter bank 24 register 2

0x308 - Filter bank 25 register 1

0x30c - Filter bank 25 register 2

0x310 - Filter bank 26 register 1

0x314 - Filter bank 26 register 2

0x318 - Filter bank 27 register 1

0x31c - Filter bank 27 register 2

Trait Implementations

Auto Trait Implementations

impl Send for RegisterBlock

impl !Sync for RegisterBlock