stm32f7/stm32f779/
cryp.rs

1#[repr(C)]
2#[derive(Debug)]
3///Register block
4pub struct RegisterBlock {
5    cr: CR,
6    sr: SR,
7    din: DIN,
8    dout: DOUT,
9    dmacr: DMACR,
10    imscr: IMSCR,
11    risr: RISR,
12    misr: MISR,
13    key: [KEY; 4],
14    init: [INIT; 2],
15    csgcmccmr: [CSGCMCCMR; 8],
16    csgcmr: [CSGCMR; 8],
17}
18impl RegisterBlock {
19    ///0x00 - control register
20    #[inline(always)]
21    pub const fn cr(&self) -> &CR {
22        &self.cr
23    }
24    ///0x04 - status register
25    #[inline(always)]
26    pub const fn sr(&self) -> &SR {
27        &self.sr
28    }
29    ///0x08 - data input register
30    #[inline(always)]
31    pub const fn din(&self) -> &DIN {
32        &self.din
33    }
34    ///0x0c - data output register
35    #[inline(always)]
36    pub const fn dout(&self) -> &DOUT {
37        &self.dout
38    }
39    ///0x10 - DMA control register
40    #[inline(always)]
41    pub const fn dmacr(&self) -> &DMACR {
42        &self.dmacr
43    }
44    ///0x14 - interrupt mask set/clear register
45    #[inline(always)]
46    pub const fn imscr(&self) -> &IMSCR {
47        &self.imscr
48    }
49    ///0x18 - raw interrupt status register
50    #[inline(always)]
51    pub const fn risr(&self) -> &RISR {
52        &self.risr
53    }
54    ///0x1c - masked interrupt status register
55    #[inline(always)]
56    pub const fn misr(&self) -> &MISR {
57        &self.misr
58    }
59    ///0x20..0x40 - Cluster KEY%s, containing K?LR, K?RR
60    #[inline(always)]
61    pub const fn key(&self, n: usize) -> &KEY {
62        &self.key[n]
63    }
64    ///Iterator for array of:
65    ///0x20..0x40 - Cluster KEY%s, containing K?LR, K?RR
66    #[inline(always)]
67    pub fn key_iter(&self) -> impl Iterator<Item = &KEY> {
68        self.key.iter()
69    }
70    ///0x40..0x50 - Cluster INIT%s, containing IV?LR, IV?RR
71    #[inline(always)]
72    pub const fn init(&self, n: usize) -> &INIT {
73        &self.init[n]
74    }
75    ///Iterator for array of:
76    ///0x40..0x50 - Cluster INIT%s, containing IV?LR, IV?RR
77    #[inline(always)]
78    pub fn init_iter(&self) -> impl Iterator<Item = &INIT> {
79        self.init.iter()
80    }
81    ///0x50..0x70 - context swap register
82    #[inline(always)]
83    pub const fn csgcmccmr(&self, n: usize) -> &CSGCMCCMR {
84        &self.csgcmccmr[n]
85    }
86    ///Iterator for array of:
87    ///0x50..0x70 - context swap register
88    #[inline(always)]
89    pub fn csgcmccmr_iter(&self) -> impl Iterator<Item = &CSGCMCCMR> {
90        self.csgcmccmr.iter()
91    }
92    ///0x50 - context swap register
93    #[inline(always)]
94    pub const fn csgcmccm0r(&self) -> &CSGCMCCMR {
95        self.csgcmccmr(0)
96    }
97    ///0x54 - context swap register
98    #[inline(always)]
99    pub const fn csgcmccm1r(&self) -> &CSGCMCCMR {
100        self.csgcmccmr(1)
101    }
102    ///0x58 - context swap register
103    #[inline(always)]
104    pub const fn csgcmccm2r(&self) -> &CSGCMCCMR {
105        self.csgcmccmr(2)
106    }
107    ///0x5c - context swap register
108    #[inline(always)]
109    pub const fn csgcmccm3r(&self) -> &CSGCMCCMR {
110        self.csgcmccmr(3)
111    }
112    ///0x60 - context swap register
113    #[inline(always)]
114    pub const fn csgcmccm4r(&self) -> &CSGCMCCMR {
115        self.csgcmccmr(4)
116    }
117    ///0x64 - context swap register
118    #[inline(always)]
119    pub const fn csgcmccm5r(&self) -> &CSGCMCCMR {
120        self.csgcmccmr(5)
121    }
122    ///0x68 - context swap register
123    #[inline(always)]
124    pub const fn csgcmccm6r(&self) -> &CSGCMCCMR {
125        self.csgcmccmr(6)
126    }
127    ///0x6c - context swap register
128    #[inline(always)]
129    pub const fn csgcmccm7r(&self) -> &CSGCMCCMR {
130        self.csgcmccmr(7)
131    }
132    ///0x70..0x90 - context swap register
133    #[inline(always)]
134    pub const fn csgcmr(&self, n: usize) -> &CSGCMR {
135        &self.csgcmr[n]
136    }
137    ///Iterator for array of:
138    ///0x70..0x90 - context swap register
139    #[inline(always)]
140    pub fn csgcmr_iter(&self) -> impl Iterator<Item = &CSGCMR> {
141        self.csgcmr.iter()
142    }
143    ///0x70 - context swap register
144    #[inline(always)]
145    pub const fn csgcm0r(&self) -> &CSGCMR {
146        self.csgcmr(0)
147    }
148    ///0x74 - context swap register
149    #[inline(always)]
150    pub const fn csgcm1r(&self) -> &CSGCMR {
151        self.csgcmr(1)
152    }
153    ///0x78 - context swap register
154    #[inline(always)]
155    pub const fn csgcm2r(&self) -> &CSGCMR {
156        self.csgcmr(2)
157    }
158    ///0x7c - context swap register
159    #[inline(always)]
160    pub const fn csgcm3r(&self) -> &CSGCMR {
161        self.csgcmr(3)
162    }
163    ///0x80 - context swap register
164    #[inline(always)]
165    pub const fn csgcm4r(&self) -> &CSGCMR {
166        self.csgcmr(4)
167    }
168    ///0x84 - context swap register
169    #[inline(always)]
170    pub const fn csgcm5r(&self) -> &CSGCMR {
171        self.csgcmr(5)
172    }
173    ///0x88 - context swap register
174    #[inline(always)]
175    pub const fn csgcm6r(&self) -> &CSGCMR {
176        self.csgcmr(6)
177    }
178    ///0x8c - context swap register
179    #[inline(always)]
180    pub const fn csgcm7r(&self) -> &CSGCMR {
181        self.csgcmr(7)
182    }
183}
184/**CR (rw) register accessor: control register
185
186You can [`read`](crate::Reg::read) this register and get [`cr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
187
188See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F779.html#CRYP:CR)
189
190For information about available fields see [`mod@cr`] module*/
191pub type CR = crate::Reg<cr::CRrs>;
192///control register
193pub mod cr;
194/**SR (r) register accessor: status register
195
196You can [`read`](crate::Reg::read) this register and get [`sr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
197
198See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F779.html#CRYP:SR)
199
200For information about available fields see [`mod@sr`] module*/
201pub type SR = crate::Reg<sr::SRrs>;
202///status register
203pub mod sr;
204/**DIN (rw) register accessor: data input register
205
206You can [`read`](crate::Reg::read) this register and get [`din::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`din::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
207
208See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F779.html#CRYP:DIN)
209
210For information about available fields see [`mod@din`] module*/
211pub type DIN = crate::Reg<din::DINrs>;
212///data input register
213pub mod din;
214/**DOUT (r) register accessor: data output register
215
216You can [`read`](crate::Reg::read) this register and get [`dout::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
217
218See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F779.html#CRYP:DOUT)
219
220For information about available fields see [`mod@dout`] module*/
221pub type DOUT = crate::Reg<dout::DOUTrs>;
222///data output register
223pub mod dout;
224/**DMACR (rw) register accessor: DMA control register
225
226You can [`read`](crate::Reg::read) this register and get [`dmacr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dmacr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
227
228See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F779.html#CRYP:DMACR)
229
230For information about available fields see [`mod@dmacr`] module*/
231pub type DMACR = crate::Reg<dmacr::DMACRrs>;
232///DMA control register
233pub mod dmacr;
234/**IMSCR (rw) register accessor: interrupt mask set/clear register
235
236You can [`read`](crate::Reg::read) this register and get [`imscr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`imscr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
237
238See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F779.html#CRYP:IMSCR)
239
240For information about available fields see [`mod@imscr`] module*/
241pub type IMSCR = crate::Reg<imscr::IMSCRrs>;
242///interrupt mask set/clear register
243pub mod imscr;
244/**RISR (r) register accessor: raw interrupt status register
245
246You can [`read`](crate::Reg::read) this register and get [`risr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
247
248See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F779.html#CRYP:RISR)
249
250For information about available fields see [`mod@risr`] module*/
251pub type RISR = crate::Reg<risr::RISRrs>;
252///raw interrupt status register
253pub mod risr;
254/**MISR (r) register accessor: masked interrupt status register
255
256You can [`read`](crate::Reg::read) this register and get [`misr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
257
258See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F779.html#CRYP:MISR)
259
260For information about available fields see [`mod@misr`] module*/
261pub type MISR = crate::Reg<misr::MISRrs>;
262///masked interrupt status register
263pub mod misr;
264///Cluster KEY%s, containing K?LR, K?RR
265pub use self::key::KEY;
266///Cluster
267///Cluster KEY%s, containing K?LR, K?RR
268pub mod key;
269///Cluster INIT%s, containing IV?LR, IV?RR
270pub use self::init::INIT;
271///Cluster
272///Cluster INIT%s, containing IV?LR, IV?RR
273pub mod init;
274/**CSGCMCCMR (rw) register accessor: context swap register
275
276You can [`read`](crate::Reg::read) this register and get [`csgcmccmr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`csgcmccmr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
277
278See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F779.html#CRYP:CSGCMCCM[0]R)
279
280For information about available fields see [`mod@csgcmccmr`] module*/
281pub type CSGCMCCMR = crate::Reg<csgcmccmr::CSGCMCCMRrs>;
282///context swap register
283pub mod csgcmccmr;
284/**CSGCMR (rw) register accessor: context swap register
285
286You can [`read`](crate::Reg::read) this register and get [`csgcmr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`csgcmr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
287
288See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F779.html#CRYP:CSGCM[0]R)
289
290For information about available fields see [`mod@csgcmr`] module*/
291pub type CSGCMR = crate::Reg<csgcmr::CSGCMRrs>;
292///context swap register
293pub mod csgcmr;
stm32f7/stm32f779/cryp.rs

stm32f7/stm32f779/
cryp.rs
