stm32f7/stm32f733/syscfg/
pmc.rs

1///Register `PMC` reader
2pub type R = crate::R<PMCrs>;
3///Register `PMC` writer
4pub type W = crate::W<PMCrs>;
5///Field `I2C1_FMP` reader - I2C1_FMP I2C1 Fast Mode + Enable
6pub type I2C1_FMP_R = crate::BitReader;
7///Field `I2C1_FMP` writer - I2C1_FMP I2C1 Fast Mode + Enable
8pub type I2C1_FMP_W<'a, REG> = crate::BitWriter<'a, REG>;
9///Field `I2C2_FMP` reader - I2C2_FMP I2C2 Fast Mode + Enable
10pub type I2C2_FMP_R = crate::BitReader;
11///Field `I2C2_FMP` writer - I2C2_FMP I2C2 Fast Mode + Enable
12pub type I2C2_FMP_W<'a, REG> = crate::BitWriter<'a, REG>;
13///Field `I2C3_FMP` reader - I2C3_FMP I2C3 Fast Mode + Enable
14pub type I2C3_FMP_R = crate::BitReader;
15///Field `I2C3_FMP` writer - I2C3_FMP I2C3 Fast Mode + Enable
16pub type I2C3_FMP_W<'a, REG> = crate::BitWriter<'a, REG>;
17///Field `PB6_FMP` reader - PB6_FMP Fast Mode
18pub type PB6_FMP_R = crate::BitReader;
19///Field `PB6_FMP` writer - PB6_FMP Fast Mode
20pub type PB6_FMP_W<'a, REG> = crate::BitWriter<'a, REG>;
21///Field `PB7_FMP` reader - PB7_FMP Fast Mode + Enable
22pub type PB7_FMP_R = crate::BitReader;
23///Field `PB7_FMP` writer - PB7_FMP Fast Mode + Enable
24pub type PB7_FMP_W<'a, REG> = crate::BitWriter<'a, REG>;
25///Field `PB8_FMP` reader - PB8_FMP Fast Mode + Enable
26pub type PB8_FMP_R = crate::BitReader;
27///Field `PB8_FMP` writer - PB8_FMP Fast Mode + Enable
28pub type PB8_FMP_W<'a, REG> = crate::BitWriter<'a, REG>;
29///Field `PB9_FMP` reader - Fast Mode + Enable
30pub type PB9_FMP_R = crate::BitReader;
31///Field `PB9_FMP` writer - Fast Mode + Enable
32pub type PB9_FMP_W<'a, REG> = crate::BitWriter<'a, REG>;
33///Field `ADC1DC2` reader - ADC3DC2
34pub type ADC1DC2_R = crate::BitReader;
35///Field `ADC1DC2` writer - ADC3DC2
36pub type ADC1DC2_W<'a, REG> = crate::BitWriter<'a, REG>;
37///Field `ADC2DC2` reader - ADC2DC2
38pub type ADC2DC2_R = crate::BitReader;
39///Field `ADC2DC2` writer - ADC2DC2
40pub type ADC2DC2_W<'a, REG> = crate::BitWriter<'a, REG>;
41///Field `ADC3DC2` reader - ADC3DC2
42pub type ADC3DC2_R = crate::BitReader;
43///Field `ADC3DC2` writer - ADC3DC2
44pub type ADC3DC2_W<'a, REG> = crate::BitWriter<'a, REG>;
45impl R {
46    ///Bit 0 - I2C1_FMP I2C1 Fast Mode + Enable
47    #[inline(always)]
48    pub fn i2c1_fmp(&self) -> I2C1_FMP_R {
49        I2C1_FMP_R::new((self.bits & 1) != 0)
50    }
51    ///Bit 1 - I2C2_FMP I2C2 Fast Mode + Enable
52    #[inline(always)]
53    pub fn i2c2_fmp(&self) -> I2C2_FMP_R {
54        I2C2_FMP_R::new(((self.bits >> 1) & 1) != 0)
55    }
56    ///Bit 2 - I2C3_FMP I2C3 Fast Mode + Enable
57    #[inline(always)]
58    pub fn i2c3_fmp(&self) -> I2C3_FMP_R {
59        I2C3_FMP_R::new(((self.bits >> 2) & 1) != 0)
60    }
61    ///Bit 4 - PB6_FMP Fast Mode
62    #[inline(always)]
63    pub fn pb6_fmp(&self) -> PB6_FMP_R {
64        PB6_FMP_R::new(((self.bits >> 4) & 1) != 0)
65    }
66    ///Bit 5 - PB7_FMP Fast Mode + Enable
67    #[inline(always)]
68    pub fn pb7_fmp(&self) -> PB7_FMP_R {
69        PB7_FMP_R::new(((self.bits >> 5) & 1) != 0)
70    }
71    ///Bit 6 - PB8_FMP Fast Mode + Enable
72    #[inline(always)]
73    pub fn pb8_fmp(&self) -> PB8_FMP_R {
74        PB8_FMP_R::new(((self.bits >> 6) & 1) != 0)
75    }
76    ///Bit 7 - Fast Mode + Enable
77    #[inline(always)]
78    pub fn pb9_fmp(&self) -> PB9_FMP_R {
79        PB9_FMP_R::new(((self.bits >> 7) & 1) != 0)
80    }
81    ///Bit 16 - ADC3DC2
82    #[inline(always)]
83    pub fn adc1dc2(&self) -> ADC1DC2_R {
84        ADC1DC2_R::new(((self.bits >> 16) & 1) != 0)
85    }
86    ///Bit 17 - ADC2DC2
87    #[inline(always)]
88    pub fn adc2dc2(&self) -> ADC2DC2_R {
89        ADC2DC2_R::new(((self.bits >> 17) & 1) != 0)
90    }
91    ///Bit 18 - ADC3DC2
92    #[inline(always)]
93    pub fn adc3dc2(&self) -> ADC3DC2_R {
94        ADC3DC2_R::new(((self.bits >> 18) & 1) != 0)
95    }
96}
97impl core::fmt::Debug for R {
98    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
99        f.debug_struct("PMC")
100            .field("pb7_fmp", &self.pb7_fmp())
101            .field("pb8_fmp", &self.pb8_fmp())
102            .field("pb9_fmp", &self.pb9_fmp())
103            .field("adc1dc2", &self.adc1dc2())
104            .field("pb6_fmp", &self.pb6_fmp())
105            .field("i2c3_fmp", &self.i2c3_fmp())
106            .field("i2c2_fmp", &self.i2c2_fmp())
107            .field("i2c1_fmp", &self.i2c1_fmp())
108            .field("adc3dc2", &self.adc3dc2())
109            .field("adc2dc2", &self.adc2dc2())
110            .finish()
111    }
112}
113impl W {
114    ///Bit 0 - I2C1_FMP I2C1 Fast Mode + Enable
115    #[inline(always)]
116    pub fn i2c1_fmp(&mut self) -> I2C1_FMP_W<PMCrs> {
117        I2C1_FMP_W::new(self, 0)
118    }
119    ///Bit 1 - I2C2_FMP I2C2 Fast Mode + Enable
120    #[inline(always)]
121    pub fn i2c2_fmp(&mut self) -> I2C2_FMP_W<PMCrs> {
122        I2C2_FMP_W::new(self, 1)
123    }
124    ///Bit 2 - I2C3_FMP I2C3 Fast Mode + Enable
125    #[inline(always)]
126    pub fn i2c3_fmp(&mut self) -> I2C3_FMP_W<PMCrs> {
127        I2C3_FMP_W::new(self, 2)
128    }
129    ///Bit 4 - PB6_FMP Fast Mode
130    #[inline(always)]
131    pub fn pb6_fmp(&mut self) -> PB6_FMP_W<PMCrs> {
132        PB6_FMP_W::new(self, 4)
133    }
134    ///Bit 5 - PB7_FMP Fast Mode + Enable
135    #[inline(always)]
136    pub fn pb7_fmp(&mut self) -> PB7_FMP_W<PMCrs> {
137        PB7_FMP_W::new(self, 5)
138    }
139    ///Bit 6 - PB8_FMP Fast Mode + Enable
140    #[inline(always)]
141    pub fn pb8_fmp(&mut self) -> PB8_FMP_W<PMCrs> {
142        PB8_FMP_W::new(self, 6)
143    }
144    ///Bit 7 - Fast Mode + Enable
145    #[inline(always)]
146    pub fn pb9_fmp(&mut self) -> PB9_FMP_W<PMCrs> {
147        PB9_FMP_W::new(self, 7)
148    }
149    ///Bit 16 - ADC3DC2
150    #[inline(always)]
151    pub fn adc1dc2(&mut self) -> ADC1DC2_W<PMCrs> {
152        ADC1DC2_W::new(self, 16)
153    }
154    ///Bit 17 - ADC2DC2
155    #[inline(always)]
156    pub fn adc2dc2(&mut self) -> ADC2DC2_W<PMCrs> {
157        ADC2DC2_W::new(self, 17)
158    }
159    ///Bit 18 - ADC3DC2
160    #[inline(always)]
161    pub fn adc3dc2(&mut self) -> ADC3DC2_W<PMCrs> {
162        ADC3DC2_W::new(self, 18)
163    }
164}
165/**peripheral mode configuration register
166
167You can [`read`](crate::Reg::read) this register and get [`pmc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pmc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
168
169See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F733.html#SYSCFG:PMC)*/
170pub struct PMCrs;
171impl crate::RegisterSpec for PMCrs {
172    type Ux = u32;
173}
174///`read()` method returns [`pmc::R`](R) reader structure
175impl crate::Readable for PMCrs {}
176///`write(|w| ..)` method takes [`pmc::W`](W) writer structure
177impl crate::Writable for PMCrs {
178    type Safety = crate::Unsafe;
179}
180///`reset()` method sets PMC to value 0
181impl crate::Resettable for PMCrs {}
stm32f7/stm32f733/syscfg/pmc.rs

stm32f7/stm32f733/syscfg/
pmc.rs
