stm32f7/stm32f733/
gpioh.rs

1#[repr(C)]
2#[derive(Debug)]
3///Register block
4pub struct RegisterBlock {
5    moder: MODER,
6    otyper: OTYPER,
7    ospeedr: OSPEEDR,
8    pupdr: PUPDR,
9    idr: IDR,
10    odr: ODR,
11    bsrr: BSRR,
12    lckr: LCKR,
13    afrl: AFRL,
14    afrh: AFRH,
15}
16impl RegisterBlock {
17    ///0x00 - GPIO port mode register
18    #[inline(always)]
19    pub const fn moder(&self) -> &MODER {
20        &self.moder
21    }
22    ///0x04 - GPIO port output type register
23    #[inline(always)]
24    pub const fn otyper(&self) -> &OTYPER {
25        &self.otyper
26    }
27    ///0x08 - GPIO port output speed register
28    #[inline(always)]
29    pub const fn ospeedr(&self) -> &OSPEEDR {
30        &self.ospeedr
31    }
32    ///0x0c - GPIO port pull-up/pull-down register
33    #[inline(always)]
34    pub const fn pupdr(&self) -> &PUPDR {
35        &self.pupdr
36    }
37    ///0x10 - GPIO port input data register
38    #[inline(always)]
39    pub const fn idr(&self) -> &IDR {
40        &self.idr
41    }
42    ///0x14 - GPIO port output data register
43    #[inline(always)]
44    pub const fn odr(&self) -> &ODR {
45        &self.odr
46    }
47    ///0x18 - GPIO port bit set/reset register
48    #[inline(always)]
49    pub const fn bsrr(&self) -> &BSRR {
50        &self.bsrr
51    }
52    ///0x1c - GPIO port configuration lock register
53    #[inline(always)]
54    pub const fn lckr(&self) -> &LCKR {
55        &self.lckr
56    }
57    ///0x20 - GPIO alternate function lowregister
58    #[inline(always)]
59    pub const fn afrl(&self) -> &AFRL {
60        &self.afrl
61    }
62    ///0x24 - GPIO alternate function high register
63    #[inline(always)]
64    pub const fn afrh(&self) -> &AFRH {
65        &self.afrh
66    }
67}
68/**MODER (rw) register accessor: GPIO port mode register
69
70You can [`read`](crate::Reg::read) this register and get [`moder::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`moder::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
71
72See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F733.html#GPIOH:MODER)
73
74For information about available fields see [`mod@moder`] module*/
75pub type MODER = crate::Reg<moder::MODERrs>;
76///GPIO port mode register
77pub mod moder;
78pub use crate::stm32f733::gpioa::otyper;
79pub use crate::stm32f733::gpioa::OTYPER;
80/**OSPEEDR (rw) register accessor: GPIO port output speed register
81
82You can [`read`](crate::Reg::read) this register and get [`ospeedr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ospeedr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
83
84See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F733.html#GPIOH:OSPEEDR)
85
86For information about available fields see [`mod@ospeedr`] module*/
87pub type OSPEEDR = crate::Reg<ospeedr::OSPEEDRrs>;
88///GPIO port output speed register
89pub mod ospeedr;
90/**PUPDR (rw) register accessor: GPIO port pull-up/pull-down register
91
92You can [`read`](crate::Reg::read) this register and get [`pupdr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pupdr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
93
94See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F733.html#GPIOH:PUPDR)
95
96For information about available fields see [`mod@pupdr`] module*/
97pub type PUPDR = crate::Reg<pupdr::PUPDRrs>;
98///GPIO port pull-up/pull-down register
99pub mod pupdr;
100pub use crate::stm32f733::gpioa::afrh;
101pub use crate::stm32f733::gpioa::afrl;
102pub use crate::stm32f733::gpioa::bsrr;
103pub use crate::stm32f733::gpioa::idr;
104pub use crate::stm32f733::gpioa::lckr;
105pub use crate::stm32f733::gpioa::odr;
106pub use crate::stm32f733::gpioa::AFRH;
107pub use crate::stm32f733::gpioa::AFRL;
108pub use crate::stm32f733::gpioa::BSRR;
109pub use crate::stm32f733::gpioa::IDR;
110pub use crate::stm32f733::gpioa::LCKR;
111pub use crate::stm32f733::gpioa::ODR;
stm32f7/stm32f733/gpioh.rs

stm32f7/stm32f733/
gpioh.rs
