[][src]Type Definition stm32f7::stm32f7x9::dma2::st::cr::W

type W = W<u32, CR>;

Writer for register CR

Methods

impl W[src]

pub fn chsel(&mut self) -> CHSEL_W[src]

Bits 25:28 - Channel selection

pub fn mburst(&mut self) -> MBURST_W[src]

Bits 23:24 - Memory burst transfer configuration

pub fn pburst(&mut self) -> PBURST_W[src]

Bits 21:22 - Peripheral burst transfer configuration

pub fn ct(&mut self) -> CT_W[src]

Bit 19 - Current target (only in double buffer mode)

pub fn dbm(&mut self) -> DBM_W[src]

Bit 18 - Double buffer mode

pub fn pl(&mut self) -> PL_W[src]

Bits 16:17 - Priority level

pub fn pincos(&mut self) -> PINCOS_W[src]

Bit 15 - Peripheral increment offset size

pub fn msize(&mut self) -> MSIZE_W[src]

Bits 13:14 - Memory data size

pub fn psize(&mut self) -> PSIZE_W[src]

Bits 11:12 - Peripheral data size

pub fn minc(&mut self) -> MINC_W[src]

Bit 10 - Memory increment mode

pub fn pinc(&mut self) -> PINC_W[src]

Bit 9 - Peripheral increment mode

pub fn circ(&mut self) -> CIRC_W[src]

Bit 8 - Circular mode

pub fn dir(&mut self) -> DIR_W[src]

Bits 6:7 - Data transfer direction

pub fn pfctrl(&mut self) -> PFCTRL_W[src]

Bit 5 - Peripheral flow controller

pub fn tcie(&mut self) -> TCIE_W[src]

Bit 4 - Transfer complete interrupt enable

pub fn htie(&mut self) -> HTIE_W[src]

Bit 3 - Half transfer interrupt enable

pub fn teie(&mut self) -> TEIE_W[src]

Bit 2 - Transfer error interrupt enable

pub fn dmeie(&mut self) -> DMEIE_W[src]

Bit 1 - Direct mode error interrupt enable

pub fn en(&mut self) -> EN_W[src]

Bit 0 - Stream enable / flag stream ready when read low