1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217
#[doc = "Reader of register CFR"] pub type R = crate::R<u32, super::CFR>; #[doc = "Writer for register CFR"] pub type W = crate::W<u32, super::CFR>; #[doc = "Register CFR `reset()`'s with value 0x7f"] impl crate::ResetValue for super::CFR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0x7f } } #[doc = "Early wakeup interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum EWI_A { #[doc = "1: interrupt occurs whenever the counter reaches the value 0x40"] ENABLE = 1, } impl From<EWI_A> for bool { #[inline(always)] fn from(variant: EWI_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `EWI`"] pub type EWI_R = crate::R<bool, EWI_A>; impl EWI_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> crate::Variant<bool, EWI_A> { use crate::Variant::*; match self.bits { true => Val(EWI_A::ENABLE), i => Res(i), } } #[doc = "Checks if the value of the field is `ENABLE`"] #[inline(always)] pub fn is_enable(&self) -> bool { *self == EWI_A::ENABLE } } #[doc = "Write proxy for field `EWI`"] pub struct EWI_W<'a> { w: &'a mut W, } impl<'a> EWI_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: EWI_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "interrupt occurs whenever the counter reaches the value 0x40"] #[inline(always)] pub fn enable(self) -> &'a mut W { self.variant(EWI_A::ENABLE) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); self.w } } #[doc = "Reader of field `W`"] pub type W_R = crate::R<u8, u8>; #[doc = "Write proxy for field `W`"] pub struct W_W<'a> { w: &'a mut W, } impl<'a> W_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x7f) | ((value as u32) & 0x7f); self.w } } #[doc = "Timer base\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] #[repr(u8)] pub enum WDGTB_A { #[doc = "0: Counter clock (PCLK1 div 4096) div 1"] DIV1 = 0, #[doc = "1: Counter clock (PCLK1 div 4096) div 2"] DIV2 = 1, #[doc = "2: Counter clock (PCLK1 div 4096) div 4"] DIV4 = 2, #[doc = "3: Counter clock (PCLK1 div 4096) div 8"] DIV8 = 3, } impl From<WDGTB_A> for u8 { #[inline(always)] fn from(variant: WDGTB_A) -> Self { variant as _ } } #[doc = "Reader of field `WDGTB`"] pub type WDGTB_R = crate::R<u8, WDGTB_A>; impl WDGTB_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> WDGTB_A { match self.bits { 0 => WDGTB_A::DIV1, 1 => WDGTB_A::DIV2, 2 => WDGTB_A::DIV4, 3 => WDGTB_A::DIV8, _ => unreachable!(), } } #[doc = "Checks if the value of the field is `DIV1`"] #[inline(always)] pub fn is_div1(&self) -> bool { *self == WDGTB_A::DIV1 } #[doc = "Checks if the value of the field is `DIV2`"] #[inline(always)] pub fn is_div2(&self) -> bool { *self == WDGTB_A::DIV2 } #[doc = "Checks if the value of the field is `DIV4`"] #[inline(always)] pub fn is_div4(&self) -> bool { *self == WDGTB_A::DIV4 } #[doc = "Checks if the value of the field is `DIV8`"] #[inline(always)] pub fn is_div8(&self) -> bool { *self == WDGTB_A::DIV8 } } #[doc = "Write proxy for field `WDGTB`"] pub struct WDGTB_W<'a> { w: &'a mut W, } impl<'a> WDGTB_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: WDGTB_A) -> &'a mut W { { self.bits(variant.into()) } } #[doc = "Counter clock (PCLK1 div 4096) div 1"] #[inline(always)] pub fn div1(self) -> &'a mut W { self.variant(WDGTB_A::DIV1) } #[doc = "Counter clock (PCLK1 div 4096) div 2"] #[inline(always)] pub fn div2(self) -> &'a mut W { self.variant(WDGTB_A::DIV2) } #[doc = "Counter clock (PCLK1 div 4096) div 4"] #[inline(always)] pub fn div4(self) -> &'a mut W { self.variant(WDGTB_A::DIV4) } #[doc = "Counter clock (PCLK1 div 4096) div 8"] #[inline(always)] pub fn div8(self) -> &'a mut W { self.variant(WDGTB_A::DIV8) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 7)) | (((value as u32) & 0x03) << 7); self.w } } impl R { #[doc = "Bit 9 - Early wakeup interrupt"] #[inline(always)] pub fn ewi(&self) -> EWI_R { EWI_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bits 0:6 - 7-bit window value"] #[inline(always)] pub fn w(&self) -> W_R { W_R::new((self.bits & 0x7f) as u8) } #[doc = "Bits 7:8 - Timer base"] #[inline(always)] pub fn wdgtb(&self) -> WDGTB_R { WDGTB_R::new(((self.bits >> 7) & 0x03) as u8) } } impl W { #[doc = "Bit 9 - Early wakeup interrupt"] #[inline(always)] pub fn ewi(&mut self) -> EWI_W { EWI_W { w: self } } #[doc = "Bits 0:6 - 7-bit window value"] #[inline(always)] pub fn w(&mut self) -> W_W { W_W { w: self } } #[doc = "Bits 7:8 - Timer base"] #[inline(always)] pub fn wdgtb(&mut self) -> WDGTB_W { WDGTB_W { w: self } } }