stm32f7_staging/stm32f779/dsi/
wier.rs

1///Register `WIER` reader
2pub type R = crate::R<WIERrs>;
3///Register `WIER` writer
4pub type W = crate::W<WIERrs>;
5///Field `TEIE` reader - Tearing Effect Interrupt Enable
6pub type TEIE_R = crate::BitReader;
7///Field `TEIE` writer - Tearing Effect Interrupt Enable
8pub type TEIE_W<'a, REG> = crate::BitWriter<'a, REG>;
9///Field `ERIE` reader - End of Refresh Interrupt Enable
10pub type ERIE_R = crate::BitReader;
11///Field `ERIE` writer - End of Refresh Interrupt Enable
12pub type ERIE_W<'a, REG> = crate::BitWriter<'a, REG>;
13///Field `PLLLIE` reader - PLL Lock Interrupt Enable
14pub type PLLLIE_R = crate::BitReader;
15///Field `PLLLIE` writer - PLL Lock Interrupt Enable
16pub type PLLLIE_W<'a, REG> = crate::BitWriter<'a, REG>;
17///Field `PLLUIE` reader - PLL Unlock Interrupt Enable
18pub type PLLUIE_R = crate::BitReader;
19///Field `PLLUIE` writer - PLL Unlock Interrupt Enable
20pub type PLLUIE_W<'a, REG> = crate::BitWriter<'a, REG>;
21///Field `RRIE` reader - Regulator Ready Interrupt Enable
22pub type RRIE_R = crate::BitReader;
23///Field `RRIE` writer - Regulator Ready Interrupt Enable
24pub type RRIE_W<'a, REG> = crate::BitWriter<'a, REG>;
25impl R {
26    ///Bit 0 - Tearing Effect Interrupt Enable
27    #[inline(always)]
28    pub fn teie(&self) -> TEIE_R {
29        TEIE_R::new((self.bits & 1) != 0)
30    }
31    ///Bit 1 - End of Refresh Interrupt Enable
32    #[inline(always)]
33    pub fn erie(&self) -> ERIE_R {
34        ERIE_R::new(((self.bits >> 1) & 1) != 0)
35    }
36    ///Bit 9 - PLL Lock Interrupt Enable
37    #[inline(always)]
38    pub fn plllie(&self) -> PLLLIE_R {
39        PLLLIE_R::new(((self.bits >> 9) & 1) != 0)
40    }
41    ///Bit 10 - PLL Unlock Interrupt Enable
42    #[inline(always)]
43    pub fn plluie(&self) -> PLLUIE_R {
44        PLLUIE_R::new(((self.bits >> 10) & 1) != 0)
45    }
46    ///Bit 13 - Regulator Ready Interrupt Enable
47    #[inline(always)]
48    pub fn rrie(&self) -> RRIE_R {
49        RRIE_R::new(((self.bits >> 13) & 1) != 0)
50    }
51}
52impl core::fmt::Debug for R {
53    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
54        f.debug_struct("WIER")
55            .field("rrie", &self.rrie())
56            .field("plluie", &self.plluie())
57            .field("plllie", &self.plllie())
58            .field("erie", &self.erie())
59            .field("teie", &self.teie())
60            .finish()
61    }
62}
63impl W {
64    ///Bit 0 - Tearing Effect Interrupt Enable
65    #[inline(always)]
66    pub fn teie(&mut self) -> TEIE_W<WIERrs> {
67        TEIE_W::new(self, 0)
68    }
69    ///Bit 1 - End of Refresh Interrupt Enable
70    #[inline(always)]
71    pub fn erie(&mut self) -> ERIE_W<WIERrs> {
72        ERIE_W::new(self, 1)
73    }
74    ///Bit 9 - PLL Lock Interrupt Enable
75    #[inline(always)]
76    pub fn plllie(&mut self) -> PLLLIE_W<WIERrs> {
77        PLLLIE_W::new(self, 9)
78    }
79    ///Bit 10 - PLL Unlock Interrupt Enable
80    #[inline(always)]
81    pub fn plluie(&mut self) -> PLLUIE_W<WIERrs> {
82        PLLUIE_W::new(self, 10)
83    }
84    ///Bit 13 - Regulator Ready Interrupt Enable
85    #[inline(always)]
86    pub fn rrie(&mut self) -> RRIE_W<WIERrs> {
87        RRIE_W::new(self, 13)
88    }
89}
90/**DSI Wrapper Interrupt Enable Register
91
92You can [`read`](crate::Reg::read) this register and get [`wier::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wier::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
93
94See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F779.html#DSI:WIER)*/
95pub struct WIERrs;
96impl crate::RegisterSpec for WIERrs {
97    type Ux = u32;
98}
99///`read()` method returns [`wier::R`](R) reader structure
100impl crate::Readable for WIERrs {}
101///`write(|w| ..)` method takes [`wier::W`](W) writer structure
102impl crate::Writable for WIERrs {
103    type Safety = crate::Unsafe;
104}
105///`reset()` method sets WIER to value 0
106impl crate::Resettable for WIERrs {}
stm32f7_staging/stm32f779/dsi/wier.rs

stm32f7_staging/stm32f779/dsi/
wier.rs
