stm32f7_staging/stm32f779/dsi/
lcvcidr.rs

1///Register `LCVCIDR` reader
2pub type R = crate::R<LCVCIDRrs>;
3///Field `VCID` reader - Virtual Channel ID
4pub type VCID_R = crate::FieldReader;
5impl R {
6    ///Bits 0:1 - Virtual Channel ID
7    #[inline(always)]
8    pub fn vcid(&self) -> VCID_R {
9        VCID_R::new((self.bits & 3) as u8)
10    }
11}
12impl core::fmt::Debug for R {
13    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
14        f.debug_struct("LCVCIDR")
15            .field("vcid", &self.vcid())
16            .finish()
17    }
18}
19/**DSI Host LTDC Current VCID Register
20
21You can [`read`](crate::Reg::read) this register and get [`lcvcidr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
22
23See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F779.html#DSI:LCVCIDR)*/
24pub struct LCVCIDRrs;
25impl crate::RegisterSpec for LCVCIDRrs {
26    type Ux = u32;
27}
28///`read()` method returns [`lcvcidr::R`](R) reader structure
29impl crate::Readable for LCVCIDRrs {}
30///`reset()` method sets LCVCIDR to value 0
31impl crate::Resettable for LCVCIDRrs {}