stm32f7_staging/stm32f779/dsi/
cr.rs

1///Register `CR` reader
2pub type R = crate::R<CRrs>;
3///Register `CR` writer
4pub type W = crate::W<CRrs>;
5///Field `EN` reader - Enable
6pub type EN_R = crate::BitReader;
7///Field `EN` writer - Enable
8pub type EN_W<'a, REG> = crate::BitWriter<'a, REG>;
9impl R {
10    ///Bit 0 - Enable
11    #[inline(always)]
12    pub fn en(&self) -> EN_R {
13        EN_R::new((self.bits & 1) != 0)
14    }
15}
16impl core::fmt::Debug for R {
17    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
18        f.debug_struct("CR").field("en", &self.en()).finish()
19    }
20}
21impl W {
22    ///Bit 0 - Enable
23    #[inline(always)]
24    pub fn en(&mut self) -> EN_W<CRrs> {
25        EN_W::new(self, 0)
26    }
27}
28/**DSI Host Control Register
29
30You can [`read`](crate::Reg::read) this register and get [`cr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
31
32See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F779.html#DSI:CR)*/
33pub struct CRrs;
34impl crate::RegisterSpec for CRrs {
35    type Ux = u32;
36}
37///`read()` method returns [`cr::R`](R) reader structure
38impl crate::Readable for CRrs {}
39///`write(|w| ..)` method takes [`cr::W`](W) writer structure
40impl crate::Writable for CRrs {
41    type Safety = crate::Unsafe;
42}
43///`reset()` method sets CR to value 0
44impl crate::Resettable for CRrs {}