stm32f7_staging/stm32f733/syscfg/
cmpcr.rs

1///Register `CMPCR` reader
2pub type R = crate::R<CMPCRrs>;
3///Field `CMP_PD` reader - Compensation cell power-down
4pub type CMP_PD_R = crate::BitReader;
5///Field `READY` reader - READY
6pub type READY_R = crate::BitReader;
7impl R {
8    ///Bit 0 - Compensation cell power-down
9    #[inline(always)]
10    pub fn cmp_pd(&self) -> CMP_PD_R {
11        CMP_PD_R::new((self.bits & 1) != 0)
12    }
13    ///Bit 8 - READY
14    #[inline(always)]
15    pub fn ready(&self) -> READY_R {
16        READY_R::new(((self.bits >> 8) & 1) != 0)
17    }
18}
19impl core::fmt::Debug for R {
20    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
21        f.debug_struct("CMPCR")
22            .field("ready", &self.ready())
23            .field("cmp_pd", &self.cmp_pd())
24            .finish()
25    }
26}
27/**Compensation cell control register
28
29You can [`read`](crate::Reg::read) this register and get [`cmpcr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
30
31See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F733.html#SYSCFG:CMPCR)*/
32pub struct CMPCRrs;
33impl crate::RegisterSpec for CMPCRrs {
34    type Ux = u32;
35}
36///`read()` method returns [`cmpcr::R`](R) reader structure
37impl crate::Readable for CMPCRrs {}
38///`reset()` method sets CMPCR to value 0
39impl crate::Resettable for CMPCRrs {}
stm32f7_staging/stm32f733/syscfg/cmpcr.rs

stm32f7_staging/stm32f733/syscfg/
cmpcr.rs
