stm32f7_staging/stm32f733/sdmmc1/
cmd.rs

1///Register `CMD` reader
2pub type R = crate::R<CMDrs>;
3///Register `CMD` writer
4pub type W = crate::W<CMDrs>;
5///Field `CMDINDEX` reader - Command index
6pub type CMDINDEX_R = crate::FieldReader;
7///Field `CMDINDEX` writer - Command index
8pub type CMDINDEX_W<'a, REG> = crate::FieldWriter<'a, REG, 6, u8, crate::Safe>;
9/**Wait for response bits
10
11Value on reset: 0*/
12#[cfg_attr(feature = "defmt", derive(defmt::Format))]
13#[derive(Clone, Copy, Debug, PartialEq, Eq)]
14#[repr(u8)]
15pub enum WAITRESP {
16    ///0: No response
17    NoResponse = 0,
18    ///1: Short response
19    ShortResponse = 1,
20    ///2: No reponse
21    NoResponse2 = 2,
22    ///3: Long reponse
23    LongResponse = 3,
24}
25impl From<WAITRESP> for u8 {
26    #[inline(always)]
27    fn from(variant: WAITRESP) -> Self {
28        variant as _
29    }
30}
31impl crate::FieldSpec for WAITRESP {
32    type Ux = u8;
33}
34impl crate::IsEnum for WAITRESP {}
35///Field `WAITRESP` reader - Wait for response bits
36pub type WAITRESP_R = crate::FieldReader<WAITRESP>;
37impl WAITRESP_R {
38    ///Get enumerated values variant
39    #[inline(always)]
40    pub const fn variant(&self) -> WAITRESP {
41        match self.bits {
42            0 => WAITRESP::NoResponse,
43            1 => WAITRESP::ShortResponse,
44            2 => WAITRESP::NoResponse2,
45            3 => WAITRESP::LongResponse,
46            _ => unreachable!(),
47        }
48    }
49    ///No response
50    #[inline(always)]
51    pub fn is_no_response(&self) -> bool {
52        *self == WAITRESP::NoResponse
53    }
54    ///Short response
55    #[inline(always)]
56    pub fn is_short_response(&self) -> bool {
57        *self == WAITRESP::ShortResponse
58    }
59    ///No reponse
60    #[inline(always)]
61    pub fn is_no_response2(&self) -> bool {
62        *self == WAITRESP::NoResponse2
63    }
64    ///Long reponse
65    #[inline(always)]
66    pub fn is_long_response(&self) -> bool {
67        *self == WAITRESP::LongResponse
68    }
69}
70///Field `WAITRESP` writer - Wait for response bits
71pub type WAITRESP_W<'a, REG> = crate::FieldWriter<'a, REG, 2, WAITRESP, crate::Safe>;
72impl<'a, REG> WAITRESP_W<'a, REG>
73where
74    REG: crate::Writable + crate::RegisterSpec,
75    REG::Ux: From<u8>,
76{
77    ///No response
78    #[inline(always)]
79    pub fn no_response(self) -> &'a mut crate::W<REG> {
80        self.variant(WAITRESP::NoResponse)
81    }
82    ///Short response
83    #[inline(always)]
84    pub fn short_response(self) -> &'a mut crate::W<REG> {
85        self.variant(WAITRESP::ShortResponse)
86    }
87    ///No reponse
88    #[inline(always)]
89    pub fn no_response2(self) -> &'a mut crate::W<REG> {
90        self.variant(WAITRESP::NoResponse2)
91    }
92    ///Long reponse
93    #[inline(always)]
94    pub fn long_response(self) -> &'a mut crate::W<REG> {
95        self.variant(WAITRESP::LongResponse)
96    }
97}
98/**CPSM waits for interrupt request
99
100Value on reset: 0*/
101#[cfg_attr(feature = "defmt", derive(defmt::Format))]
102#[derive(Clone, Copy, Debug, PartialEq, Eq)]
103pub enum WAITINT {
104    ///0: Don't wait for interrupt request
105    Disabled = 0,
106    ///1: Wait for interrupt request
107    Enabled = 1,
108}
109impl From<WAITINT> for bool {
110    #[inline(always)]
111    fn from(variant: WAITINT) -> Self {
112        variant as u8 != 0
113    }
114}
115///Field `WAITINT` reader - CPSM waits for interrupt request
116pub type WAITINT_R = crate::BitReader<WAITINT>;
117impl WAITINT_R {
118    ///Get enumerated values variant
119    #[inline(always)]
120    pub const fn variant(&self) -> WAITINT {
121        match self.bits {
122            false => WAITINT::Disabled,
123            true => WAITINT::Enabled,
124        }
125    }
126    ///Don't wait for interrupt request
127    #[inline(always)]
128    pub fn is_disabled(&self) -> bool {
129        *self == WAITINT::Disabled
130    }
131    ///Wait for interrupt request
132    #[inline(always)]
133    pub fn is_enabled(&self) -> bool {
134        *self == WAITINT::Enabled
135    }
136}
137///Field `WAITINT` writer - CPSM waits for interrupt request
138pub type WAITINT_W<'a, REG> = crate::BitWriter<'a, REG, WAITINT>;
139impl<'a, REG> WAITINT_W<'a, REG>
140where
141    REG: crate::Writable + crate::RegisterSpec,
142{
143    ///Don't wait for interrupt request
144    #[inline(always)]
145    pub fn disabled(self) -> &'a mut crate::W<REG> {
146        self.variant(WAITINT::Disabled)
147    }
148    ///Wait for interrupt request
149    #[inline(always)]
150    pub fn enabled(self) -> &'a mut crate::W<REG> {
151        self.variant(WAITINT::Enabled)
152    }
153}
154/**CPSM Waits for ends of data transfer (CmdPend internal signal)
155
156Value on reset: 0*/
157#[cfg_attr(feature = "defmt", derive(defmt::Format))]
158#[derive(Clone, Copy, Debug, PartialEq, Eq)]
159pub enum WAITPEND {
160    ///0: Don't wait for data end
161    Disabled = 0,
162    ///1: Wait for end of data transfer signal before sending command
163    Enabled = 1,
164}
165impl From<WAITPEND> for bool {
166    #[inline(always)]
167    fn from(variant: WAITPEND) -> Self {
168        variant as u8 != 0
169    }
170}
171///Field `WAITPEND` reader - CPSM Waits for ends of data transfer (CmdPend internal signal)
172pub type WAITPEND_R = crate::BitReader<WAITPEND>;
173impl WAITPEND_R {
174    ///Get enumerated values variant
175    #[inline(always)]
176    pub const fn variant(&self) -> WAITPEND {
177        match self.bits {
178            false => WAITPEND::Disabled,
179            true => WAITPEND::Enabled,
180        }
181    }
182    ///Don't wait for data end
183    #[inline(always)]
184    pub fn is_disabled(&self) -> bool {
185        *self == WAITPEND::Disabled
186    }
187    ///Wait for end of data transfer signal before sending command
188    #[inline(always)]
189    pub fn is_enabled(&self) -> bool {
190        *self == WAITPEND::Enabled
191    }
192}
193///Field `WAITPEND` writer - CPSM Waits for ends of data transfer (CmdPend internal signal)
194pub type WAITPEND_W<'a, REG> = crate::BitWriter<'a, REG, WAITPEND>;
195impl<'a, REG> WAITPEND_W<'a, REG>
196where
197    REG: crate::Writable + crate::RegisterSpec,
198{
199    ///Don't wait for data end
200    #[inline(always)]
201    pub fn disabled(self) -> &'a mut crate::W<REG> {
202        self.variant(WAITPEND::Disabled)
203    }
204    ///Wait for end of data transfer signal before sending command
205    #[inline(always)]
206    pub fn enabled(self) -> &'a mut crate::W<REG> {
207        self.variant(WAITPEND::Enabled)
208    }
209}
210/**Command path state machine (CPSM) Enable bit
211
212Value on reset: 0*/
213#[cfg_attr(feature = "defmt", derive(defmt::Format))]
214#[derive(Clone, Copy, Debug, PartialEq, Eq)]
215pub enum CPSMEN {
216    ///0: Command path state machine disabled
217    Disabled = 0,
218    ///1: Command path state machine enabled
219    Enabled = 1,
220}
221impl From<CPSMEN> for bool {
222    #[inline(always)]
223    fn from(variant: CPSMEN) -> Self {
224        variant as u8 != 0
225    }
226}
227///Field `CPSMEN` reader - Command path state machine (CPSM) Enable bit
228pub type CPSMEN_R = crate::BitReader<CPSMEN>;
229impl CPSMEN_R {
230    ///Get enumerated values variant
231    #[inline(always)]
232    pub const fn variant(&self) -> CPSMEN {
233        match self.bits {
234            false => CPSMEN::Disabled,
235            true => CPSMEN::Enabled,
236        }
237    }
238    ///Command path state machine disabled
239    #[inline(always)]
240    pub fn is_disabled(&self) -> bool {
241        *self == CPSMEN::Disabled
242    }
243    ///Command path state machine enabled
244    #[inline(always)]
245    pub fn is_enabled(&self) -> bool {
246        *self == CPSMEN::Enabled
247    }
248}
249///Field `CPSMEN` writer - Command path state machine (CPSM) Enable bit
250pub type CPSMEN_W<'a, REG> = crate::BitWriter<'a, REG, CPSMEN>;
251impl<'a, REG> CPSMEN_W<'a, REG>
252where
253    REG: crate::Writable + crate::RegisterSpec,
254{
255    ///Command path state machine disabled
256    #[inline(always)]
257    pub fn disabled(self) -> &'a mut crate::W<REG> {
258        self.variant(CPSMEN::Disabled)
259    }
260    ///Command path state machine enabled
261    #[inline(always)]
262    pub fn enabled(self) -> &'a mut crate::W<REG> {
263        self.variant(CPSMEN::Enabled)
264    }
265}
266/**SD I/O suspend command
267
268Value on reset: 0*/
269#[cfg_attr(feature = "defmt", derive(defmt::Format))]
270#[derive(Clone, Copy, Debug, PartialEq, Eq)]
271pub enum SDIOSUSPEND {
272    ///0: Next command is not a SDIO suspend command
273    Disabled = 0,
274    ///1: Next command send is a SDIO suspend command
275    Enabled = 1,
276}
277impl From<SDIOSUSPEND> for bool {
278    #[inline(always)]
279    fn from(variant: SDIOSUSPEND) -> Self {
280        variant as u8 != 0
281    }
282}
283///Field `SDIOSuspend` reader - SD I/O suspend command
284pub type SDIOSUSPEND_R = crate::BitReader<SDIOSUSPEND>;
285impl SDIOSUSPEND_R {
286    ///Get enumerated values variant
287    #[inline(always)]
288    pub const fn variant(&self) -> SDIOSUSPEND {
289        match self.bits {
290            false => SDIOSUSPEND::Disabled,
291            true => SDIOSUSPEND::Enabled,
292        }
293    }
294    ///Next command is not a SDIO suspend command
295    #[inline(always)]
296    pub fn is_disabled(&self) -> bool {
297        *self == SDIOSUSPEND::Disabled
298    }
299    ///Next command send is a SDIO suspend command
300    #[inline(always)]
301    pub fn is_enabled(&self) -> bool {
302        *self == SDIOSUSPEND::Enabled
303    }
304}
305///Field `SDIOSuspend` writer - SD I/O suspend command
306pub type SDIOSUSPEND_W<'a, REG> = crate::BitWriter<'a, REG, SDIOSUSPEND>;
307impl<'a, REG> SDIOSUSPEND_W<'a, REG>
308where
309    REG: crate::Writable + crate::RegisterSpec,
310{
311    ///Next command is not a SDIO suspend command
312    #[inline(always)]
313    pub fn disabled(self) -> &'a mut crate::W<REG> {
314        self.variant(SDIOSUSPEND::Disabled)
315    }
316    ///Next command send is a SDIO suspend command
317    #[inline(always)]
318    pub fn enabled(self) -> &'a mut crate::W<REG> {
319        self.variant(SDIOSUSPEND::Enabled)
320    }
321}
322impl R {
323    ///Bits 0:5 - Command index
324    #[inline(always)]
325    pub fn cmdindex(&self) -> CMDINDEX_R {
326        CMDINDEX_R::new((self.bits & 0x3f) as u8)
327    }
328    ///Bits 6:7 - Wait for response bits
329    #[inline(always)]
330    pub fn waitresp(&self) -> WAITRESP_R {
331        WAITRESP_R::new(((self.bits >> 6) & 3) as u8)
332    }
333    ///Bit 8 - CPSM waits for interrupt request
334    #[inline(always)]
335    pub fn waitint(&self) -> WAITINT_R {
336        WAITINT_R::new(((self.bits >> 8) & 1) != 0)
337    }
338    ///Bit 9 - CPSM Waits for ends of data transfer (CmdPend internal signal)
339    #[inline(always)]
340    pub fn waitpend(&self) -> WAITPEND_R {
341        WAITPEND_R::new(((self.bits >> 9) & 1) != 0)
342    }
343    ///Bit 10 - Command path state machine (CPSM) Enable bit
344    #[inline(always)]
345    pub fn cpsmen(&self) -> CPSMEN_R {
346        CPSMEN_R::new(((self.bits >> 10) & 1) != 0)
347    }
348    ///Bit 11 - SD I/O suspend command
349    #[inline(always)]
350    pub fn sdiosuspend(&self) -> SDIOSUSPEND_R {
351        SDIOSUSPEND_R::new(((self.bits >> 11) & 1) != 0)
352    }
353}
354impl core::fmt::Debug for R {
355    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
356        f.debug_struct("CMD")
357            .field("sdiosuspend", &self.sdiosuspend())
358            .field("cpsmen", &self.cpsmen())
359            .field("waitpend", &self.waitpend())
360            .field("waitint", &self.waitint())
361            .field("waitresp", &self.waitresp())
362            .field("cmdindex", &self.cmdindex())
363            .finish()
364    }
365}
366impl W {
367    ///Bits 0:5 - Command index
368    #[inline(always)]
369    pub fn cmdindex(&mut self) -> CMDINDEX_W<CMDrs> {
370        CMDINDEX_W::new(self, 0)
371    }
372    ///Bits 6:7 - Wait for response bits
373    #[inline(always)]
374    pub fn waitresp(&mut self) -> WAITRESP_W<CMDrs> {
375        WAITRESP_W::new(self, 6)
376    }
377    ///Bit 8 - CPSM waits for interrupt request
378    #[inline(always)]
379    pub fn waitint(&mut self) -> WAITINT_W<CMDrs> {
380        WAITINT_W::new(self, 8)
381    }
382    ///Bit 9 - CPSM Waits for ends of data transfer (CmdPend internal signal)
383    #[inline(always)]
384    pub fn waitpend(&mut self) -> WAITPEND_W<CMDrs> {
385        WAITPEND_W::new(self, 9)
386    }
387    ///Bit 10 - Command path state machine (CPSM) Enable bit
388    #[inline(always)]
389    pub fn cpsmen(&mut self) -> CPSMEN_W<CMDrs> {
390        CPSMEN_W::new(self, 10)
391    }
392    ///Bit 11 - SD I/O suspend command
393    #[inline(always)]
394    pub fn sdiosuspend(&mut self) -> SDIOSUSPEND_W<CMDrs> {
395        SDIOSUSPEND_W::new(self, 11)
396    }
397}
398/**command register
399
400You can [`read`](crate::Reg::read) this register and get [`cmd::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
401
402See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F733.html#SDMMC1:CMD)*/
403pub struct CMDrs;
404impl crate::RegisterSpec for CMDrs {
405    type Ux = u32;
406}
407///`read()` method returns [`cmd::R`](R) reader structure
408impl crate::Readable for CMDrs {}
409///`write(|w| ..)` method takes [`cmd::W`](W) writer structure
410impl crate::Writable for CMDrs {
411    type Safety = crate::Unsafe;
412}
413///`reset()` method sets CMD to value 0
414impl crate::Resettable for CMDrs {}
stm32f7_staging/stm32f733/sdmmc1/cmd.rs

stm32f7_staging/stm32f733/sdmmc1/
cmd.rs
