stm32f7_staging/stm32f733/rtc/
isr.rs

1///Register `ISR` reader
2pub type R = crate::R<ISRrs>;
3///Register `ISR` writer
4pub type W = crate::W<ISRrs>;
5/**Alarm %s write flag
6
7Value on reset: 1*/
8#[cfg_attr(feature = "defmt", derive(defmt::Format))]
9#[derive(Clone, Copy, Debug, PartialEq, Eq)]
10pub enum ALRAWFR {
11    ///0: Alarm update not allowed
12    UpdateNotAllowed = 0,
13    ///1: Alarm update allowed
14    UpdateAllowed = 1,
15}
16impl From<ALRAWFR> for bool {
17    #[inline(always)]
18    fn from(variant: ALRAWFR) -> Self {
19        variant as u8 != 0
20    }
21}
22///Field `ALRWF(A,B)` reader - Alarm %s write flag
23pub type ALRWF_R = crate::BitReader<ALRAWFR>;
24impl ALRWF_R {
25    ///Get enumerated values variant
26    #[inline(always)]
27    pub const fn variant(&self) -> ALRAWFR {
28        match self.bits {
29            false => ALRAWFR::UpdateNotAllowed,
30            true => ALRAWFR::UpdateAllowed,
31        }
32    }
33    ///Alarm update not allowed
34    #[inline(always)]
35    pub fn is_update_not_allowed(&self) -> bool {
36        *self == ALRAWFR::UpdateNotAllowed
37    }
38    ///Alarm update allowed
39    #[inline(always)]
40    pub fn is_update_allowed(&self) -> bool {
41        *self == ALRAWFR::UpdateAllowed
42    }
43}
44/**Wakeup timer write flag
45
46Value on reset: 1*/
47#[cfg_attr(feature = "defmt", derive(defmt::Format))]
48#[derive(Clone, Copy, Debug, PartialEq, Eq)]
49pub enum WUTWFR {
50    ///0: Wakeup timer configuration update not allowed
51    UpdateNotAllowed = 0,
52    ///1: Wakeup timer configuration update allowed
53    UpdateAllowed = 1,
54}
55impl From<WUTWFR> for bool {
56    #[inline(always)]
57    fn from(variant: WUTWFR) -> Self {
58        variant as u8 != 0
59    }
60}
61///Field `WUTWF` reader - Wakeup timer write flag
62pub type WUTWF_R = crate::BitReader<WUTWFR>;
63impl WUTWF_R {
64    ///Get enumerated values variant
65    #[inline(always)]
66    pub const fn variant(&self) -> WUTWFR {
67        match self.bits {
68            false => WUTWFR::UpdateNotAllowed,
69            true => WUTWFR::UpdateAllowed,
70        }
71    }
72    ///Wakeup timer configuration update not allowed
73    #[inline(always)]
74    pub fn is_update_not_allowed(&self) -> bool {
75        *self == WUTWFR::UpdateNotAllowed
76    }
77    ///Wakeup timer configuration update allowed
78    #[inline(always)]
79    pub fn is_update_allowed(&self) -> bool {
80        *self == WUTWFR::UpdateAllowed
81    }
82}
83/**Shift operation pending
84
85Value on reset: 0*/
86#[cfg_attr(feature = "defmt", derive(defmt::Format))]
87#[derive(Clone, Copy, Debug, PartialEq, Eq)]
88pub enum SHPFR {
89    ///0: No shift operation is pending
90    NoShiftPending = 0,
91    ///1: A shift operation is pending
92    ShiftPending = 1,
93}
94impl From<SHPFR> for bool {
95    #[inline(always)]
96    fn from(variant: SHPFR) -> Self {
97        variant as u8 != 0
98    }
99}
100///Field `SHPF` reader - Shift operation pending
101pub type SHPF_R = crate::BitReader<SHPFR>;
102impl SHPF_R {
103    ///Get enumerated values variant
104    #[inline(always)]
105    pub const fn variant(&self) -> SHPFR {
106        match self.bits {
107            false => SHPFR::NoShiftPending,
108            true => SHPFR::ShiftPending,
109        }
110    }
111    ///No shift operation is pending
112    #[inline(always)]
113    pub fn is_no_shift_pending(&self) -> bool {
114        *self == SHPFR::NoShiftPending
115    }
116    ///A shift operation is pending
117    #[inline(always)]
118    pub fn is_shift_pending(&self) -> bool {
119        *self == SHPFR::ShiftPending
120    }
121}
122///Field `SHPF` writer - Shift operation pending
123pub type SHPF_W<'a, REG> = crate::BitWriter<'a, REG, SHPFR>;
124impl<'a, REG> SHPF_W<'a, REG>
125where
126    REG: crate::Writable + crate::RegisterSpec,
127{
128    ///No shift operation is pending
129    #[inline(always)]
130    pub fn no_shift_pending(self) -> &'a mut crate::W<REG> {
131        self.variant(SHPFR::NoShiftPending)
132    }
133    ///A shift operation is pending
134    #[inline(always)]
135    pub fn shift_pending(self) -> &'a mut crate::W<REG> {
136        self.variant(SHPFR::ShiftPending)
137    }
138}
139/**Initialization status flag
140
141Value on reset: 0*/
142#[cfg_attr(feature = "defmt", derive(defmt::Format))]
143#[derive(Clone, Copy, Debug, PartialEq, Eq)]
144pub enum INITSR {
145    ///0: Calendar has not been initialized
146    NotInitalized = 0,
147    ///1: Calendar has been initialized
148    Initalized = 1,
149}
150impl From<INITSR> for bool {
151    #[inline(always)]
152    fn from(variant: INITSR) -> Self {
153        variant as u8 != 0
154    }
155}
156///Field `INITS` reader - Initialization status flag
157pub type INITS_R = crate::BitReader<INITSR>;
158impl INITS_R {
159    ///Get enumerated values variant
160    #[inline(always)]
161    pub const fn variant(&self) -> INITSR {
162        match self.bits {
163            false => INITSR::NotInitalized,
164            true => INITSR::Initalized,
165        }
166    }
167    ///Calendar has not been initialized
168    #[inline(always)]
169    pub fn is_not_initalized(&self) -> bool {
170        *self == INITSR::NotInitalized
171    }
172    ///Calendar has been initialized
173    #[inline(always)]
174    pub fn is_initalized(&self) -> bool {
175        *self == INITSR::Initalized
176    }
177}
178/**Registers synchronization flag
179
180Value on reset: 0*/
181#[cfg_attr(feature = "defmt", derive(defmt::Format))]
182#[derive(Clone, Copy, Debug, PartialEq, Eq)]
183pub enum RSFR {
184    ///0: Calendar shadow registers not yet synchronized
185    NotSynced = 0,
186    ///1: Calendar shadow registers synchronized
187    Synced = 1,
188}
189impl From<RSFR> for bool {
190    #[inline(always)]
191    fn from(variant: RSFR) -> Self {
192        variant as u8 != 0
193    }
194}
195///Field `RSF` reader - Registers synchronization flag
196pub type RSF_R = crate::BitReader<RSFR>;
197impl RSF_R {
198    ///Get enumerated values variant
199    #[inline(always)]
200    pub const fn variant(&self) -> RSFR {
201        match self.bits {
202            false => RSFR::NotSynced,
203            true => RSFR::Synced,
204        }
205    }
206    ///Calendar shadow registers not yet synchronized
207    #[inline(always)]
208    pub fn is_not_synced(&self) -> bool {
209        *self == RSFR::NotSynced
210    }
211    ///Calendar shadow registers synchronized
212    #[inline(always)]
213    pub fn is_synced(&self) -> bool {
214        *self == RSFR::Synced
215    }
216}
217/**Registers synchronization flag
218
219Value on reset: 0*/
220#[cfg_attr(feature = "defmt", derive(defmt::Format))]
221#[derive(Clone, Copy, Debug, PartialEq, Eq)]
222pub enum RSFW {
223    ///0: This flag is cleared by software by writing 0
224    Clear = 0,
225}
226impl From<RSFW> for bool {
227    #[inline(always)]
228    fn from(variant: RSFW) -> Self {
229        variant as u8 != 0
230    }
231}
232///Field `RSF` writer - Registers synchronization flag
233pub type RSF_W<'a, REG> = crate::BitWriter0C<'a, REG, RSFW>;
234impl<'a, REG> RSF_W<'a, REG>
235where
236    REG: crate::Writable + crate::RegisterSpec,
237{
238    ///This flag is cleared by software by writing 0
239    #[inline(always)]
240    pub fn clear(self) -> &'a mut crate::W<REG> {
241        self.variant(RSFW::Clear)
242    }
243}
244/**Initialization flag
245
246Value on reset: 0*/
247#[cfg_attr(feature = "defmt", derive(defmt::Format))]
248#[derive(Clone, Copy, Debug, PartialEq, Eq)]
249pub enum INITFR {
250    ///0: Calendar registers update is not allowed
251    NotAllowed = 0,
252    ///1: Calendar registers update is allowed
253    Allowed = 1,
254}
255impl From<INITFR> for bool {
256    #[inline(always)]
257    fn from(variant: INITFR) -> Self {
258        variant as u8 != 0
259    }
260}
261///Field `INITF` reader - Initialization flag
262pub type INITF_R = crate::BitReader<INITFR>;
263impl INITF_R {
264    ///Get enumerated values variant
265    #[inline(always)]
266    pub const fn variant(&self) -> INITFR {
267        match self.bits {
268            false => INITFR::NotAllowed,
269            true => INITFR::Allowed,
270        }
271    }
272    ///Calendar registers update is not allowed
273    #[inline(always)]
274    pub fn is_not_allowed(&self) -> bool {
275        *self == INITFR::NotAllowed
276    }
277    ///Calendar registers update is allowed
278    #[inline(always)]
279    pub fn is_allowed(&self) -> bool {
280        *self == INITFR::Allowed
281    }
282}
283/**Initialization mode
284
285Value on reset: 0*/
286#[cfg_attr(feature = "defmt", derive(defmt::Format))]
287#[derive(Clone, Copy, Debug, PartialEq, Eq)]
288pub enum INIT {
289    ///0: Free running mode
290    FreeRunningMode = 0,
291    ///1: Initialization mode used to program time and date register (RTC_TR and RTC_DR), and prescaler register (RTC_PRER). Counters are stopped and start counting from the new value when INIT is reset.
292    InitMode = 1,
293}
294impl From<INIT> for bool {
295    #[inline(always)]
296    fn from(variant: INIT) -> Self {
297        variant as u8 != 0
298    }
299}
300///Field `INIT` reader - Initialization mode
301pub type INIT_R = crate::BitReader<INIT>;
302impl INIT_R {
303    ///Get enumerated values variant
304    #[inline(always)]
305    pub const fn variant(&self) -> INIT {
306        match self.bits {
307            false => INIT::FreeRunningMode,
308            true => INIT::InitMode,
309        }
310    }
311    ///Free running mode
312    #[inline(always)]
313    pub fn is_free_running_mode(&self) -> bool {
314        *self == INIT::FreeRunningMode
315    }
316    ///Initialization mode used to program time and date register (RTC_TR and RTC_DR), and prescaler register (RTC_PRER). Counters are stopped and start counting from the new value when INIT is reset.
317    #[inline(always)]
318    pub fn is_init_mode(&self) -> bool {
319        *self == INIT::InitMode
320    }
321}
322///Field `INIT` writer - Initialization mode
323pub type INIT_W<'a, REG> = crate::BitWriter<'a, REG, INIT>;
324impl<'a, REG> INIT_W<'a, REG>
325where
326    REG: crate::Writable + crate::RegisterSpec,
327{
328    ///Free running mode
329    #[inline(always)]
330    pub fn free_running_mode(self) -> &'a mut crate::W<REG> {
331        self.variant(INIT::FreeRunningMode)
332    }
333    ///Initialization mode used to program time and date register (RTC_TR and RTC_DR), and prescaler register (RTC_PRER). Counters are stopped and start counting from the new value when INIT is reset.
334    #[inline(always)]
335    pub fn init_mode(self) -> &'a mut crate::W<REG> {
336        self.variant(INIT::InitMode)
337    }
338}
339/**Alarm %s flag
340
341Value on reset: 0*/
342#[cfg_attr(feature = "defmt", derive(defmt::Format))]
343#[derive(Clone, Copy, Debug, PartialEq, Eq)]
344pub enum ALRAFR {
345    ///1: This flag is set by hardware when the time/date registers (RTC_TR and RTC_DR) match the Alarm register (RTC_ALRMxR)
346    Match = 1,
347}
348impl From<ALRAFR> for bool {
349    #[inline(always)]
350    fn from(variant: ALRAFR) -> Self {
351        variant as u8 != 0
352    }
353}
354///Field `ALRF(A,B)` reader - Alarm %s flag
355pub type ALRF_R = crate::BitReader<ALRAFR>;
356impl ALRF_R {
357    ///Get enumerated values variant
358    #[inline(always)]
359    pub const fn variant(&self) -> Option<ALRAFR> {
360        match self.bits {
361            true => Some(ALRAFR::Match),
362            _ => None,
363        }
364    }
365    ///This flag is set by hardware when the time/date registers (RTC_TR and RTC_DR) match the Alarm register (RTC_ALRMxR)
366    #[inline(always)]
367    pub fn is_match(&self) -> bool {
368        *self == ALRAFR::Match
369    }
370}
371/**Alarm %s flag
372
373Value on reset: 0*/
374#[cfg_attr(feature = "defmt", derive(defmt::Format))]
375#[derive(Clone, Copy, Debug, PartialEq, Eq)]
376pub enum ALRAFW {
377    ///0: This flag is cleared by software by writing 0
378    Clear = 0,
379}
380impl From<ALRAFW> for bool {
381    #[inline(always)]
382    fn from(variant: ALRAFW) -> Self {
383        variant as u8 != 0
384    }
385}
386///Field `ALRF(A,B)` writer - Alarm %s flag
387pub type ALRF_W<'a, REG> = crate::BitWriter0C<'a, REG, ALRAFW>;
388impl<'a, REG> ALRF_W<'a, REG>
389where
390    REG: crate::Writable + crate::RegisterSpec,
391{
392    ///This flag is cleared by software by writing 0
393    #[inline(always)]
394    pub fn clear(self) -> &'a mut crate::W<REG> {
395        self.variant(ALRAFW::Clear)
396    }
397}
398/**Wakeup timer flag
399
400Value on reset: 0*/
401#[cfg_attr(feature = "defmt", derive(defmt::Format))]
402#[derive(Clone, Copy, Debug, PartialEq, Eq)]
403pub enum WUTFR {
404    ///1: This flag is set by hardware when the wakeup auto-reload counter reaches 0
405    Zero = 1,
406}
407impl From<WUTFR> for bool {
408    #[inline(always)]
409    fn from(variant: WUTFR) -> Self {
410        variant as u8 != 0
411    }
412}
413///Field `WUTF` reader - Wakeup timer flag
414pub type WUTF_R = crate::BitReader<WUTFR>;
415impl WUTF_R {
416    ///Get enumerated values variant
417    #[inline(always)]
418    pub const fn variant(&self) -> Option<WUTFR> {
419        match self.bits {
420            true => Some(WUTFR::Zero),
421            _ => None,
422        }
423    }
424    ///This flag is set by hardware when the wakeup auto-reload counter reaches 0
425    #[inline(always)]
426    pub fn is_zero(&self) -> bool {
427        *self == WUTFR::Zero
428    }
429}
430/**Wakeup timer flag
431
432Value on reset: 0*/
433#[cfg_attr(feature = "defmt", derive(defmt::Format))]
434#[derive(Clone, Copy, Debug, PartialEq, Eq)]
435pub enum WUTFW {
436    ///0: This flag is cleared by software by writing 0
437    Clear = 0,
438}
439impl From<WUTFW> for bool {
440    #[inline(always)]
441    fn from(variant: WUTFW) -> Self {
442        variant as u8 != 0
443    }
444}
445///Field `WUTF` writer - Wakeup timer flag
446pub type WUTF_W<'a, REG> = crate::BitWriter0C<'a, REG, WUTFW>;
447impl<'a, REG> WUTF_W<'a, REG>
448where
449    REG: crate::Writable + crate::RegisterSpec,
450{
451    ///This flag is cleared by software by writing 0
452    #[inline(always)]
453    pub fn clear(self) -> &'a mut crate::W<REG> {
454        self.variant(WUTFW::Clear)
455    }
456}
457/**Time-stamp flag
458
459Value on reset: 0*/
460#[cfg_attr(feature = "defmt", derive(defmt::Format))]
461#[derive(Clone, Copy, Debug, PartialEq, Eq)]
462pub enum TSFR {
463    ///1: This flag is set by hardware when a time-stamp event occurs
464    TimestampEvent = 1,
465}
466impl From<TSFR> for bool {
467    #[inline(always)]
468    fn from(variant: TSFR) -> Self {
469        variant as u8 != 0
470    }
471}
472///Field `TSF` reader - Time-stamp flag
473pub type TSF_R = crate::BitReader<TSFR>;
474impl TSF_R {
475    ///Get enumerated values variant
476    #[inline(always)]
477    pub const fn variant(&self) -> Option<TSFR> {
478        match self.bits {
479            true => Some(TSFR::TimestampEvent),
480            _ => None,
481        }
482    }
483    ///This flag is set by hardware when a time-stamp event occurs
484    #[inline(always)]
485    pub fn is_timestamp_event(&self) -> bool {
486        *self == TSFR::TimestampEvent
487    }
488}
489/**Time-stamp flag
490
491Value on reset: 0*/
492#[cfg_attr(feature = "defmt", derive(defmt::Format))]
493#[derive(Clone, Copy, Debug, PartialEq, Eq)]
494pub enum TSFW {
495    ///0: This flag is cleared by software by writing 0
496    Clear = 0,
497}
498impl From<TSFW> for bool {
499    #[inline(always)]
500    fn from(variant: TSFW) -> Self {
501        variant as u8 != 0
502    }
503}
504///Field `TSF` writer - Time-stamp flag
505pub type TSF_W<'a, REG> = crate::BitWriter0C<'a, REG, TSFW>;
506impl<'a, REG> TSF_W<'a, REG>
507where
508    REG: crate::Writable + crate::RegisterSpec,
509{
510    ///This flag is cleared by software by writing 0
511    #[inline(always)]
512    pub fn clear(self) -> &'a mut crate::W<REG> {
513        self.variant(TSFW::Clear)
514    }
515}
516/**Time-stamp overflow flag
517
518Value on reset: 0*/
519#[cfg_attr(feature = "defmt", derive(defmt::Format))]
520#[derive(Clone, Copy, Debug, PartialEq, Eq)]
521pub enum TSOVFR {
522    ///1: This flag is set by hardware when a time-stamp event occurs while TSF is already set
523    Overflow = 1,
524}
525impl From<TSOVFR> for bool {
526    #[inline(always)]
527    fn from(variant: TSOVFR) -> Self {
528        variant as u8 != 0
529    }
530}
531///Field `TSOVF` reader - Time-stamp overflow flag
532pub type TSOVF_R = crate::BitReader<TSOVFR>;
533impl TSOVF_R {
534    ///Get enumerated values variant
535    #[inline(always)]
536    pub const fn variant(&self) -> Option<TSOVFR> {
537        match self.bits {
538            true => Some(TSOVFR::Overflow),
539            _ => None,
540        }
541    }
542    ///This flag is set by hardware when a time-stamp event occurs while TSF is already set
543    #[inline(always)]
544    pub fn is_overflow(&self) -> bool {
545        *self == TSOVFR::Overflow
546    }
547}
548/**Time-stamp overflow flag
549
550Value on reset: 0*/
551#[cfg_attr(feature = "defmt", derive(defmt::Format))]
552#[derive(Clone, Copy, Debug, PartialEq, Eq)]
553pub enum TSOVFW {
554    ///0: This flag is cleared by software by writing 0
555    Clear = 0,
556}
557impl From<TSOVFW> for bool {
558    #[inline(always)]
559    fn from(variant: TSOVFW) -> Self {
560        variant as u8 != 0
561    }
562}
563///Field `TSOVF` writer - Time-stamp overflow flag
564pub type TSOVF_W<'a, REG> = crate::BitWriter0C<'a, REG, TSOVFW>;
565impl<'a, REG> TSOVF_W<'a, REG>
566where
567    REG: crate::Writable + crate::RegisterSpec,
568{
569    ///This flag is cleared by software by writing 0
570    #[inline(always)]
571    pub fn clear(self) -> &'a mut crate::W<REG> {
572        self.variant(TSOVFW::Clear)
573    }
574}
575/**Tamper detection flag
576
577Value on reset: 0*/
578#[cfg_attr(feature = "defmt", derive(defmt::Format))]
579#[derive(Clone, Copy, Debug, PartialEq, Eq)]
580pub enum TAMP1FR {
581    ///1: This flag is set by hardware when a tamper detection event is detected on the RTC_TAMPx input
582    Tampered = 1,
583}
584impl From<TAMP1FR> for bool {
585    #[inline(always)]
586    fn from(variant: TAMP1FR) -> Self {
587        variant as u8 != 0
588    }
589}
590///Field `TAMP1F` reader - Tamper detection flag
591pub type TAMP1F_R = crate::BitReader<TAMP1FR>;
592impl TAMP1F_R {
593    ///Get enumerated values variant
594    #[inline(always)]
595    pub const fn variant(&self) -> Option<TAMP1FR> {
596        match self.bits {
597            true => Some(TAMP1FR::Tampered),
598            _ => None,
599        }
600    }
601    ///This flag is set by hardware when a tamper detection event is detected on the RTC_TAMPx input
602    #[inline(always)]
603    pub fn is_tampered(&self) -> bool {
604        *self == TAMP1FR::Tampered
605    }
606}
607/**Tamper detection flag
608
609Value on reset: 0*/
610#[cfg_attr(feature = "defmt", derive(defmt::Format))]
611#[derive(Clone, Copy, Debug, PartialEq, Eq)]
612pub enum TAMP1FW {
613    ///0: Flag cleared by software writing 0
614    Clear = 0,
615}
616impl From<TAMP1FW> for bool {
617    #[inline(always)]
618    fn from(variant: TAMP1FW) -> Self {
619        variant as u8 != 0
620    }
621}
622///Field `TAMP1F` writer - Tamper detection flag
623pub type TAMP1F_W<'a, REG> = crate::BitWriter0C<'a, REG, TAMP1FW>;
624impl<'a, REG> TAMP1F_W<'a, REG>
625where
626    REG: crate::Writable + crate::RegisterSpec,
627{
628    ///Flag cleared by software writing 0
629    #[inline(always)]
630    pub fn clear(self) -> &'a mut crate::W<REG> {
631        self.variant(TAMP1FW::Clear)
632    }
633}
634///Field `TAMP2F` reader - RTC_TAMP2 detection flag
635pub use TAMP1F_R as TAMP2F_R;
636///Field `TAMP3F` reader - RTC_TAMP3 detection flag
637pub use TAMP1F_R as TAMP3F_R;
638///Field `TAMP2F` writer - RTC_TAMP2 detection flag
639pub use TAMP1F_W as TAMP2F_W;
640///Field `TAMP3F` writer - RTC_TAMP3 detection flag
641pub use TAMP1F_W as TAMP3F_W;
642/**Recalibration pending Flag
643
644Value on reset: 0*/
645#[cfg_attr(feature = "defmt", derive(defmt::Format))]
646#[derive(Clone, Copy, Debug, PartialEq, Eq)]
647pub enum RECALPFR {
648    ///1: The RECALPF status flag is automatically set to 1 when software writes to the RTC_CALR register, indicating that the RTC_CALR register is blocked. When the new calibration settings are taken into account, this bit returns to 0
649    Pending = 1,
650}
651impl From<RECALPFR> for bool {
652    #[inline(always)]
653    fn from(variant: RECALPFR) -> Self {
654        variant as u8 != 0
655    }
656}
657///Field `RECALPF` reader - Recalibration pending Flag
658pub type RECALPF_R = crate::BitReader<RECALPFR>;
659impl RECALPF_R {
660    ///Get enumerated values variant
661    #[inline(always)]
662    pub const fn variant(&self) -> Option<RECALPFR> {
663        match self.bits {
664            true => Some(RECALPFR::Pending),
665            _ => None,
666        }
667    }
668    ///The RECALPF status flag is automatically set to 1 when software writes to the RTC_CALR register, indicating that the RTC_CALR register is blocked. When the new calibration settings are taken into account, this bit returns to 0
669    #[inline(always)]
670    pub fn is_pending(&self) -> bool {
671        *self == RECALPFR::Pending
672    }
673}
674///Field `ITSF` reader - Internal tTime-stamp flag
675pub type ITSF_R = crate::BitReader;
676impl R {
677    ///Alarm (A,B) write flag
678    ///
679    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `ALRAWF` field.</div>
680    #[inline(always)]
681    pub fn alrwf(&self, n: u8) -> ALRWF_R {
682        #[allow(clippy::no_effect)]
683        [(); 2][n as usize];
684        ALRWF_R::new(((self.bits >> n) & 1) != 0)
685    }
686    ///Iterator for array of:
687    ///Alarm (A,B) write flag
688    #[inline(always)]
689    pub fn alrwf_iter(&self) -> impl Iterator<Item = ALRWF_R> + '_ {
690        (0..2).map(move |n| ALRWF_R::new(((self.bits >> n) & 1) != 0))
691    }
692    ///Bit 0 - Alarm A write flag
693    #[inline(always)]
694    pub fn alrawf(&self) -> ALRWF_R {
695        ALRWF_R::new((self.bits & 1) != 0)
696    }
697    ///Bit 1 - Alarm B write flag
698    #[inline(always)]
699    pub fn alrbwf(&self) -> ALRWF_R {
700        ALRWF_R::new(((self.bits >> 1) & 1) != 0)
701    }
702    ///Bit 2 - Wakeup timer write flag
703    #[inline(always)]
704    pub fn wutwf(&self) -> WUTWF_R {
705        WUTWF_R::new(((self.bits >> 2) & 1) != 0)
706    }
707    ///Bit 3 - Shift operation pending
708    #[inline(always)]
709    pub fn shpf(&self) -> SHPF_R {
710        SHPF_R::new(((self.bits >> 3) & 1) != 0)
711    }
712    ///Bit 4 - Initialization status flag
713    #[inline(always)]
714    pub fn inits(&self) -> INITS_R {
715        INITS_R::new(((self.bits >> 4) & 1) != 0)
716    }
717    ///Bit 5 - Registers synchronization flag
718    #[inline(always)]
719    pub fn rsf(&self) -> RSF_R {
720        RSF_R::new(((self.bits >> 5) & 1) != 0)
721    }
722    ///Bit 6 - Initialization flag
723    #[inline(always)]
724    pub fn initf(&self) -> INITF_R {
725        INITF_R::new(((self.bits >> 6) & 1) != 0)
726    }
727    ///Bit 7 - Initialization mode
728    #[inline(always)]
729    pub fn init(&self) -> INIT_R {
730        INIT_R::new(((self.bits >> 7) & 1) != 0)
731    }
732    ///Alarm (A,B) flag
733    ///
734    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `ALRAF` field.</div>
735    #[inline(always)]
736    pub fn alrf(&self, n: u8) -> ALRF_R {
737        #[allow(clippy::no_effect)]
738        [(); 2][n as usize];
739        ALRF_R::new(((self.bits >> (n + 8)) & 1) != 0)
740    }
741    ///Iterator for array of:
742    ///Alarm (A,B) flag
743    #[inline(always)]
744    pub fn alrf_iter(&self) -> impl Iterator<Item = ALRF_R> + '_ {
745        (0..2).map(move |n| ALRF_R::new(((self.bits >> (n + 8)) & 1) != 0))
746    }
747    ///Bit 8 - Alarm A flag
748    #[inline(always)]
749    pub fn alraf(&self) -> ALRF_R {
750        ALRF_R::new(((self.bits >> 8) & 1) != 0)
751    }
752    ///Bit 9 - Alarm B flag
753    #[inline(always)]
754    pub fn alrbf(&self) -> ALRF_R {
755        ALRF_R::new(((self.bits >> 9) & 1) != 0)
756    }
757    ///Bit 10 - Wakeup timer flag
758    #[inline(always)]
759    pub fn wutf(&self) -> WUTF_R {
760        WUTF_R::new(((self.bits >> 10) & 1) != 0)
761    }
762    ///Bit 11 - Time-stamp flag
763    #[inline(always)]
764    pub fn tsf(&self) -> TSF_R {
765        TSF_R::new(((self.bits >> 11) & 1) != 0)
766    }
767    ///Bit 12 - Time-stamp overflow flag
768    #[inline(always)]
769    pub fn tsovf(&self) -> TSOVF_R {
770        TSOVF_R::new(((self.bits >> 12) & 1) != 0)
771    }
772    ///Bit 13 - Tamper detection flag
773    #[inline(always)]
774    pub fn tamp1f(&self) -> TAMP1F_R {
775        TAMP1F_R::new(((self.bits >> 13) & 1) != 0)
776    }
777    ///Bit 14 - RTC_TAMP2 detection flag
778    #[inline(always)]
779    pub fn tamp2f(&self) -> TAMP2F_R {
780        TAMP2F_R::new(((self.bits >> 14) & 1) != 0)
781    }
782    ///Bit 15 - RTC_TAMP3 detection flag
783    #[inline(always)]
784    pub fn tamp3f(&self) -> TAMP3F_R {
785        TAMP3F_R::new(((self.bits >> 15) & 1) != 0)
786    }
787    ///Bit 16 - Recalibration pending Flag
788    #[inline(always)]
789    pub fn recalpf(&self) -> RECALPF_R {
790        RECALPF_R::new(((self.bits >> 16) & 1) != 0)
791    }
792    ///Bit 17 - Internal tTime-stamp flag
793    #[inline(always)]
794    pub fn itsf(&self) -> ITSF_R {
795        ITSF_R::new(((self.bits >> 17) & 1) != 0)
796    }
797}
798impl core::fmt::Debug for R {
799    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
800        f.debug_struct("ISR")
801            .field("alrawf", &self.alrawf())
802            .field("alrbwf", &self.alrbwf())
803            .field("wutwf", &self.wutwf())
804            .field("shpf", &self.shpf())
805            .field("inits", &self.inits())
806            .field("rsf", &self.rsf())
807            .field("initf", &self.initf())
808            .field("init", &self.init())
809            .field("alraf", &self.alraf())
810            .field("alrbf", &self.alrbf())
811            .field("wutf", &self.wutf())
812            .field("tsf", &self.tsf())
813            .field("tsovf", &self.tsovf())
814            .field("tamp1f", &self.tamp1f())
815            .field("tamp2f", &self.tamp2f())
816            .field("tamp3f", &self.tamp3f())
817            .field("recalpf", &self.recalpf())
818            .field("itsf", &self.itsf())
819            .finish()
820    }
821}
822impl W {
823    ///Bit 3 - Shift operation pending
824    #[inline(always)]
825    pub fn shpf(&mut self) -> SHPF_W<ISRrs> {
826        SHPF_W::new(self, 3)
827    }
828    ///Bit 5 - Registers synchronization flag
829    #[inline(always)]
830    pub fn rsf(&mut self) -> RSF_W<ISRrs> {
831        RSF_W::new(self, 5)
832    }
833    ///Bit 7 - Initialization mode
834    #[inline(always)]
835    pub fn init(&mut self) -> INIT_W<ISRrs> {
836        INIT_W::new(self, 7)
837    }
838    ///Alarm (A,B) flag
839    ///
840    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `ALRAF` field.</div>
841    #[inline(always)]
842    pub fn alrf(&mut self, n: u8) -> ALRF_W<ISRrs> {
843        #[allow(clippy::no_effect)]
844        [(); 2][n as usize];
845        ALRF_W::new(self, n + 8)
846    }
847    ///Bit 8 - Alarm A flag
848    #[inline(always)]
849    pub fn alraf(&mut self) -> ALRF_W<ISRrs> {
850        ALRF_W::new(self, 8)
851    }
852    ///Bit 9 - Alarm B flag
853    #[inline(always)]
854    pub fn alrbf(&mut self) -> ALRF_W<ISRrs> {
855        ALRF_W::new(self, 9)
856    }
857    ///Bit 10 - Wakeup timer flag
858    #[inline(always)]
859    pub fn wutf(&mut self) -> WUTF_W<ISRrs> {
860        WUTF_W::new(self, 10)
861    }
862    ///Bit 11 - Time-stamp flag
863    #[inline(always)]
864    pub fn tsf(&mut self) -> TSF_W<ISRrs> {
865        TSF_W::new(self, 11)
866    }
867    ///Bit 12 - Time-stamp overflow flag
868    #[inline(always)]
869    pub fn tsovf(&mut self) -> TSOVF_W<ISRrs> {
870        TSOVF_W::new(self, 12)
871    }
872    ///Bit 13 - Tamper detection flag
873    #[inline(always)]
874    pub fn tamp1f(&mut self) -> TAMP1F_W<ISRrs> {
875        TAMP1F_W::new(self, 13)
876    }
877    ///Bit 14 - RTC_TAMP2 detection flag
878    #[inline(always)]
879    pub fn tamp2f(&mut self) -> TAMP2F_W<ISRrs> {
880        TAMP2F_W::new(self, 14)
881    }
882    ///Bit 15 - RTC_TAMP3 detection flag
883    #[inline(always)]
884    pub fn tamp3f(&mut self) -> TAMP3F_W<ISRrs> {
885        TAMP3F_W::new(self, 15)
886    }
887}
888/**initialization and status register
889
890You can [`read`](crate::Reg::read) this register and get [`isr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`isr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
891
892See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F733.html#RTC:ISR)*/
893pub struct ISRrs;
894impl crate::RegisterSpec for ISRrs {
895    type Ux = u32;
896}
897///`read()` method returns [`isr::R`](R) reader structure
898impl crate::Readable for ISRrs {}
899///`write(|w| ..)` method takes [`isr::W`](W) writer structure
900impl crate::Writable for ISRrs {
901    type Safety = crate::Unsafe;
902    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0xff20;
903}
904///`reset()` method sets ISR to value 0x07
905impl crate::Resettable for ISRrs {
906    const RESET_VALUE: u32 = 0x07;
907}
stm32f7_staging/stm32f733/rtc/isr.rs

stm32f7_staging/stm32f733/rtc/
isr.rs
