stm32f7_staging/stm32f733/rtc/
calr.rs

1///Register `CALR` reader
2pub type R = crate::R<CALRrs>;
3///Register `CALR` writer
4pub type W = crate::W<CALRrs>;
5///Field `CALM` reader - Calibration minus
6pub type CALM_R = crate::FieldReader<u16>;
7///Field `CALM` writer - Calibration minus
8pub type CALM_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16, crate::Safe>;
9/**Use a 16-second calibration cycle period
10
11Value on reset: 0*/
12#[cfg_attr(feature = "defmt", derive(defmt::Format))]
13#[derive(Clone, Copy, Debug, PartialEq, Eq)]
14pub enum CALW16 {
15    ///1: When CALW16 is set to ‘1’, the 16-second calibration cycle period is selected.This bit must not be set to ‘1’ if CALW8=1
16    SixteenSecond = 1,
17}
18impl From<CALW16> for bool {
19    #[inline(always)]
20    fn from(variant: CALW16) -> Self {
21        variant as u8 != 0
22    }
23}
24///Field `CALW16` reader - Use a 16-second calibration cycle period
25pub type CALW16_R = crate::BitReader<CALW16>;
26impl CALW16_R {
27    ///Get enumerated values variant
28    #[inline(always)]
29    pub const fn variant(&self) -> Option<CALW16> {
30        match self.bits {
31            true => Some(CALW16::SixteenSecond),
32            _ => None,
33        }
34    }
35    ///When CALW16 is set to ‘1’, the 16-second calibration cycle period is selected.This bit must not be set to ‘1’ if CALW8=1
36    #[inline(always)]
37    pub fn is_sixteen_second(&self) -> bool {
38        *self == CALW16::SixteenSecond
39    }
40}
41///Field `CALW16` writer - Use a 16-second calibration cycle period
42pub type CALW16_W<'a, REG> = crate::BitWriter<'a, REG, CALW16>;
43impl<'a, REG> CALW16_W<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    ///When CALW16 is set to ‘1’, the 16-second calibration cycle period is selected.This bit must not be set to ‘1’ if CALW8=1
48    #[inline(always)]
49    pub fn sixteen_second(self) -> &'a mut crate::W<REG> {
50        self.variant(CALW16::SixteenSecond)
51    }
52}
53/**Use an 8-second calibration cycle period
54
55Value on reset: 0*/
56#[cfg_attr(feature = "defmt", derive(defmt::Format))]
57#[derive(Clone, Copy, Debug, PartialEq, Eq)]
58pub enum CALW8 {
59    ///1: When CALW8 is set to ‘1’, the 8-second calibration cycle period is selected
60    EightSecond = 1,
61}
62impl From<CALW8> for bool {
63    #[inline(always)]
64    fn from(variant: CALW8) -> Self {
65        variant as u8 != 0
66    }
67}
68///Field `CALW8` reader - Use an 8-second calibration cycle period
69pub type CALW8_R = crate::BitReader<CALW8>;
70impl CALW8_R {
71    ///Get enumerated values variant
72    #[inline(always)]
73    pub const fn variant(&self) -> Option<CALW8> {
74        match self.bits {
75            true => Some(CALW8::EightSecond),
76            _ => None,
77        }
78    }
79    ///When CALW8 is set to ‘1’, the 8-second calibration cycle period is selected
80    #[inline(always)]
81    pub fn is_eight_second(&self) -> bool {
82        *self == CALW8::EightSecond
83    }
84}
85///Field `CALW8` writer - Use an 8-second calibration cycle period
86pub type CALW8_W<'a, REG> = crate::BitWriter<'a, REG, CALW8>;
87impl<'a, REG> CALW8_W<'a, REG>
88where
89    REG: crate::Writable + crate::RegisterSpec,
90{
91    ///When CALW8 is set to ‘1’, the 8-second calibration cycle period is selected
92    #[inline(always)]
93    pub fn eight_second(self) -> &'a mut crate::W<REG> {
94        self.variant(CALW8::EightSecond)
95    }
96}
97/**Increase frequency of RTC by 488.5 ppm
98
99Value on reset: 0*/
100#[cfg_attr(feature = "defmt", derive(defmt::Format))]
101#[derive(Clone, Copy, Debug, PartialEq, Eq)]
102pub enum CALP {
103    ///0: No RTCCLK pulses are added
104    NoChange = 0,
105    ///1: One RTCCLK pulse is effectively inserted every 2^11 pulses (frequency increased by 488.5 ppm)
106    IncreaseFreq = 1,
107}
108impl From<CALP> for bool {
109    #[inline(always)]
110    fn from(variant: CALP) -> Self {
111        variant as u8 != 0
112    }
113}
114///Field `CALP` reader - Increase frequency of RTC by 488.5 ppm
115pub type CALP_R = crate::BitReader<CALP>;
116impl CALP_R {
117    ///Get enumerated values variant
118    #[inline(always)]
119    pub const fn variant(&self) -> CALP {
120        match self.bits {
121            false => CALP::NoChange,
122            true => CALP::IncreaseFreq,
123        }
124    }
125    ///No RTCCLK pulses are added
126    #[inline(always)]
127    pub fn is_no_change(&self) -> bool {
128        *self == CALP::NoChange
129    }
130    ///One RTCCLK pulse is effectively inserted every 2^11 pulses (frequency increased by 488.5 ppm)
131    #[inline(always)]
132    pub fn is_increase_freq(&self) -> bool {
133        *self == CALP::IncreaseFreq
134    }
135}
136///Field `CALP` writer - Increase frequency of RTC by 488.5 ppm
137pub type CALP_W<'a, REG> = crate::BitWriter<'a, REG, CALP>;
138impl<'a, REG> CALP_W<'a, REG>
139where
140    REG: crate::Writable + crate::RegisterSpec,
141{
142    ///No RTCCLK pulses are added
143    #[inline(always)]
144    pub fn no_change(self) -> &'a mut crate::W<REG> {
145        self.variant(CALP::NoChange)
146    }
147    ///One RTCCLK pulse is effectively inserted every 2^11 pulses (frequency increased by 488.5 ppm)
148    #[inline(always)]
149    pub fn increase_freq(self) -> &'a mut crate::W<REG> {
150        self.variant(CALP::IncreaseFreq)
151    }
152}
153impl R {
154    ///Bits 0:8 - Calibration minus
155    #[inline(always)]
156    pub fn calm(&self) -> CALM_R {
157        CALM_R::new((self.bits & 0x01ff) as u16)
158    }
159    ///Bit 13 - Use a 16-second calibration cycle period
160    #[inline(always)]
161    pub fn calw16(&self) -> CALW16_R {
162        CALW16_R::new(((self.bits >> 13) & 1) != 0)
163    }
164    ///Bit 14 - Use an 8-second calibration cycle period
165    #[inline(always)]
166    pub fn calw8(&self) -> CALW8_R {
167        CALW8_R::new(((self.bits >> 14) & 1) != 0)
168    }
169    ///Bit 15 - Increase frequency of RTC by 488.5 ppm
170    #[inline(always)]
171    pub fn calp(&self) -> CALP_R {
172        CALP_R::new(((self.bits >> 15) & 1) != 0)
173    }
174}
175impl core::fmt::Debug for R {
176    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
177        f.debug_struct("CALR")
178            .field("calp", &self.calp())
179            .field("calw8", &self.calw8())
180            .field("calw16", &self.calw16())
181            .field("calm", &self.calm())
182            .finish()
183    }
184}
185impl W {
186    ///Bits 0:8 - Calibration minus
187    #[inline(always)]
188    pub fn calm(&mut self) -> CALM_W<CALRrs> {
189        CALM_W::new(self, 0)
190    }
191    ///Bit 13 - Use a 16-second calibration cycle period
192    #[inline(always)]
193    pub fn calw16(&mut self) -> CALW16_W<CALRrs> {
194        CALW16_W::new(self, 13)
195    }
196    ///Bit 14 - Use an 8-second calibration cycle period
197    #[inline(always)]
198    pub fn calw8(&mut self) -> CALW8_W<CALRrs> {
199        CALW8_W::new(self, 14)
200    }
201    ///Bit 15 - Increase frequency of RTC by 488.5 ppm
202    #[inline(always)]
203    pub fn calp(&mut self) -> CALP_W<CALRrs> {
204        CALP_W::new(self, 15)
205    }
206}
207/**calibration register
208
209You can [`read`](crate::Reg::read) this register and get [`calr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`calr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
210
211See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F733.html#RTC:CALR)*/
212pub struct CALRrs;
213impl crate::RegisterSpec for CALRrs {
214    type Ux = u32;
215}
216///`read()` method returns [`calr::R`](R) reader structure
217impl crate::Readable for CALRrs {}
218///`write(|w| ..)` method takes [`calr::W`](W) writer structure
219impl crate::Writable for CALRrs {
220    type Safety = crate::Unsafe;
221}
222///`reset()` method sets CALR to value 0
223impl crate::Resettable for CALRrs {}
stm32f7_staging/stm32f733/rtc/calr.rs

stm32f7_staging/stm32f733/rtc/
calr.rs
