stm32f7_staging/stm32f733/crc/
cr.rs

1///Register `CR` writer
2pub type W = crate::W<CRrs>;
3/**RESET bit
4
5Value on reset: 0*/
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum RESETW {
9    ///1: Resets the CRC calculation unit and sets the data register to 0xFFFF FFFF
10    Reset = 1,
11}
12impl From<RESETW> for bool {
13    #[inline(always)]
14    fn from(variant: RESETW) -> Self {
15        variant as u8 != 0
16    }
17}
18///Field `RESET` writer - RESET bit
19pub type RESET_W<'a, REG> = crate::BitWriter<'a, REG, RESETW>;
20impl<'a, REG> RESET_W<'a, REG>
21where
22    REG: crate::Writable + crate::RegisterSpec,
23{
24    ///Resets the CRC calculation unit and sets the data register to 0xFFFF FFFF
25    #[inline(always)]
26    pub fn reset(self) -> &'a mut crate::W<REG> {
27        self.variant(RESETW::Reset)
28    }
29}
30/**Polynomial size
31
32Value on reset: 0*/
33#[cfg_attr(feature = "defmt", derive(defmt::Format))]
34#[derive(Clone, Copy, Debug, PartialEq, Eq)]
35#[repr(u8)]
36pub enum POLYSIZE {
37    ///0: 32-bit polynomial
38    Polysize32 = 0,
39    ///1: 16-bit polynomial
40    Polysize16 = 1,
41    ///2: 8-bit polynomial
42    Polysize8 = 2,
43    ///3: 7-bit polynomial
44    Polysize7 = 3,
45}
46impl From<POLYSIZE> for u8 {
47    #[inline(always)]
48    fn from(variant: POLYSIZE) -> Self {
49        variant as _
50    }
51}
52impl crate::FieldSpec for POLYSIZE {
53    type Ux = u8;
54}
55impl crate::IsEnum for POLYSIZE {}
56///Field `POLYSIZE` writer - Polynomial size
57pub type POLYSIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, POLYSIZE, crate::Safe>;
58impl<'a, REG> POLYSIZE_W<'a, REG>
59where
60    REG: crate::Writable + crate::RegisterSpec,
61    REG::Ux: From<u8>,
62{
63    ///32-bit polynomial
64    #[inline(always)]
65    pub fn polysize32(self) -> &'a mut crate::W<REG> {
66        self.variant(POLYSIZE::Polysize32)
67    }
68    ///16-bit polynomial
69    #[inline(always)]
70    pub fn polysize16(self) -> &'a mut crate::W<REG> {
71        self.variant(POLYSIZE::Polysize16)
72    }
73    ///8-bit polynomial
74    #[inline(always)]
75    pub fn polysize8(self) -> &'a mut crate::W<REG> {
76        self.variant(POLYSIZE::Polysize8)
77    }
78    ///7-bit polynomial
79    #[inline(always)]
80    pub fn polysize7(self) -> &'a mut crate::W<REG> {
81        self.variant(POLYSIZE::Polysize7)
82    }
83}
84/**Reverse input data
85
86Value on reset: 0*/
87#[cfg_attr(feature = "defmt", derive(defmt::Format))]
88#[derive(Clone, Copy, Debug, PartialEq, Eq)]
89#[repr(u8)]
90pub enum REV_IN {
91    ///0: Bit order not affected
92    Normal = 0,
93    ///1: Bit reversal done by byte
94    Byte = 1,
95    ///2: Bit reversal done by half-word
96    HalfWord = 2,
97    ///3: Bit reversal done by word
98    Word = 3,
99}
100impl From<REV_IN> for u8 {
101    #[inline(always)]
102    fn from(variant: REV_IN) -> Self {
103        variant as _
104    }
105}
106impl crate::FieldSpec for REV_IN {
107    type Ux = u8;
108}
109impl crate::IsEnum for REV_IN {}
110///Field `REV_IN` writer - Reverse input data
111pub type REV_IN_W<'a, REG> = crate::FieldWriter<'a, REG, 2, REV_IN, crate::Safe>;
112impl<'a, REG> REV_IN_W<'a, REG>
113where
114    REG: crate::Writable + crate::RegisterSpec,
115    REG::Ux: From<u8>,
116{
117    ///Bit order not affected
118    #[inline(always)]
119    pub fn normal(self) -> &'a mut crate::W<REG> {
120        self.variant(REV_IN::Normal)
121    }
122    ///Bit reversal done by byte
123    #[inline(always)]
124    pub fn byte(self) -> &'a mut crate::W<REG> {
125        self.variant(REV_IN::Byte)
126    }
127    ///Bit reversal done by half-word
128    #[inline(always)]
129    pub fn half_word(self) -> &'a mut crate::W<REG> {
130        self.variant(REV_IN::HalfWord)
131    }
132    ///Bit reversal done by word
133    #[inline(always)]
134    pub fn word(self) -> &'a mut crate::W<REG> {
135        self.variant(REV_IN::Word)
136    }
137}
138/**Reverse output data
139
140Value on reset: 0*/
141#[cfg_attr(feature = "defmt", derive(defmt::Format))]
142#[derive(Clone, Copy, Debug, PartialEq, Eq)]
143pub enum REV_OUT {
144    ///0: Bit order not affected
145    Normal = 0,
146    ///1: Bit reversed output
147    Reversed = 1,
148}
149impl From<REV_OUT> for bool {
150    #[inline(always)]
151    fn from(variant: REV_OUT) -> Self {
152        variant as u8 != 0
153    }
154}
155///Field `REV_OUT` writer - Reverse output data
156pub type REV_OUT_W<'a, REG> = crate::BitWriter<'a, REG, REV_OUT>;
157impl<'a, REG> REV_OUT_W<'a, REG>
158where
159    REG: crate::Writable + crate::RegisterSpec,
160{
161    ///Bit order not affected
162    #[inline(always)]
163    pub fn normal(self) -> &'a mut crate::W<REG> {
164        self.variant(REV_OUT::Normal)
165    }
166    ///Bit reversed output
167    #[inline(always)]
168    pub fn reversed(self) -> &'a mut crate::W<REG> {
169        self.variant(REV_OUT::Reversed)
170    }
171}
172impl core::fmt::Debug for crate::generic::Reg<CRrs> {
173    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
174        write!(f, "(not readable)")
175    }
176}
177impl W {
178    ///Bit 0 - RESET bit
179    #[inline(always)]
180    pub fn reset(&mut self) -> RESET_W<CRrs> {
181        RESET_W::new(self, 0)
182    }
183    ///Bits 3:4 - Polynomial size
184    #[inline(always)]
185    pub fn polysize(&mut self) -> POLYSIZE_W<CRrs> {
186        POLYSIZE_W::new(self, 3)
187    }
188    ///Bits 5:6 - Reverse input data
189    #[inline(always)]
190    pub fn rev_in(&mut self) -> REV_IN_W<CRrs> {
191        REV_IN_W::new(self, 5)
192    }
193    ///Bit 7 - Reverse output data
194    #[inline(always)]
195    pub fn rev_out(&mut self) -> REV_OUT_W<CRrs> {
196        REV_OUT_W::new(self, 7)
197    }
198}
199/**Control register
200
201You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
202
203See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F733.html#CRC:CR)*/
204pub struct CRrs;
205impl crate::RegisterSpec for CRrs {
206    type Ux = u32;
207}
208///`write(|w| ..)` method takes [`cr::W`](W) writer structure
209impl crate::Writable for CRrs {
210    type Safety = crate::Unsafe;
211}
212///`reset()` method sets CR to value 0
213impl crate::Resettable for CRrs {}
stm32f7_staging/stm32f733/crc/cr.rs

stm32f7_staging/stm32f733/crc/
cr.rs
