Module stm32f4xx_hal::pac::sdio::clkcr

SDI clock control register

Structs

• CLKCR_SPEC
  SDI clock control register
• R
  Register CLKCR reader
• W
  Register CLKCR writer

Enums

• BYPASS_A
  Clock divider bypass enable bit
• CLKEN_A
  Clock enable bit
• HWFC_EN_A
  HW Flow Control enable
• NEGEDGE_A
  SDIO_CK dephasing selection bit
• PWRSAV_A
  Power saving configuration bit
• WIDBUS_A
  Wide bus mode enable bit

Type Aliases

• BYPASS_R
  Field BYPASS reader - Clock divider bypass enable bit
• BYPASS_W
  Field BYPASS writer - Clock divider bypass enable bit
• CLKDIV_R
  Field CLKDIV reader - Clock divide factor
• CLKDIV_W
  Field CLKDIV writer - Clock divide factor
• CLKEN_R
  Field CLKEN reader - Clock enable bit
• CLKEN_W
  Field CLKEN writer - Clock enable bit
• HWFC_EN_R
  Field HWFC_EN reader - HW Flow Control enable
• HWFC_EN_W
  Field HWFC_EN writer - HW Flow Control enable
• NEGEDGE_R
  Field NEGEDGE reader - SDIO_CK dephasing selection bit
• NEGEDGE_W
  Field NEGEDGE writer - SDIO_CK dephasing selection bit
• PWRSAV_R
  Field PWRSAV reader - Power saving configuration bit
• PWRSAV_W
  Field PWRSAV writer - Power saving configuration bit
• WIDBUS_R
  Field WIDBUS reader - Wide bus mode enable bit
• WIDBUS_W
  Field WIDBUS writer - Wide bus mode enable bit