Module stm32f4xx_hal::pac::fmc::sdcr
source · Expand description
SDRAM Control Register 1
Structs§
- Register
SDCR%sreader - SDRAM Control Register 1
- Register
SDCR%swriter
Enums§
- CAS latency
- Memory data bus width
- Number of internal banks
- Number of column address bits
- Number of row address bits
- Burst read
- Read pipe
- SDRAM clock configuration
- Write protection
Type Aliases§
- Field
CASreader - CAS latency - Field
CASwriter - CAS latency - Field
MWIDreader - Memory data bus width - Field
MWIDwriter - Memory data bus width - Field
NBreader - Number of internal banks - Field
NBwriter - Number of internal banks - Field
NCreader - Number of column address bits - Field
NCwriter - Number of column address bits - Field
NRreader - Number of row address bits - Field
NRwriter - Number of row address bits - Field
RBURSTreader - Burst read - Field
RBURSTwriter - Burst read - Field
RPIPEreader - Read pipe - Field
RPIPEwriter - Read pipe - Field
SDCLKreader - SDRAM clock configuration - Field
SDCLKwriter - SDRAM clock configuration - Field
WPreader - Write protection - Field
WPwriter - Write protection