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//!
//! Asynchronous serial communication using USART peripherals
//!
//! # Word length
//!
//! By default, the UART/USART uses 8 data bits. The `Serial`, `Rx`, and `Tx` structs implement
//! the embedded-hal read and write traits with `u8` as the word type.
//!
//! You can also configure the hardware to use 9 data bits with the `Config` `wordlength_9()`
//! function. After creating a `Serial` with this option, use the `with_u16_data()` function to
//! convert the `Serial<_, u8>` object into a `Serial<_, u16>` that can send and receive `u16`s.
//!
//! In this mode, the `Serial<_, u16>`, `Rx<_, u16>`, and `Tx<_, u16>` structs instead implement
//! the embedded-hal read and write traits with `u16` as the word type. You can use these
//! implementations for 9-bit words.
use core::marker::PhantomData;
mod hal_02;
mod hal_1;
pub(crate) mod uart_impls;
pub use uart_impls::Instance;
use uart_impls::RegisterBlockImpl;
use crate::gpio::{self, PushPull};
use crate::pac;
use crate::gpio::NoPin;
use crate::rcc::Clocks;
/// Serial error kind
///
/// This represents a common set of serial operation errors. HAL implementations are
/// free to define more specific or additional error types. However, by providing
/// a mapping to these common serial errors, generic code can still react to them.
#[derive(Debug, Copy, Clone, Eq, PartialEq, Ord, PartialOrd, Hash)]
#[non_exhaustive]
pub enum Error {
/// The peripheral receive buffer was overrun.
Overrun,
/// Received data does not conform to the peripheral configuration.
/// Can be caused by a misconfigured device on either end of the serial line.
FrameFormat,
/// Parity check failed.
Parity,
/// Serial line is too noisy to read valid data.
Noise,
/// A different error occurred. The original error may contain more information.
Other,
}
/// UART interrupt events
#[enumflags2::bitflags]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[derive(Debug, Eq, PartialEq, Copy, Clone)]
#[repr(u32)]
pub enum Event {
/// IDLE interrupt enable
Idle = 1 << 4,
/// RXNE interrupt enable
RxNotEmpty = 1 << 5,
/// Transmission complete interrupt enable
TransmissionComplete = 1 << 6,
/// TXE interrupt enable
TxEmpty = 1 << 7,
/// PE interrupt enable
ParityError = 1 << 8,
}
/// UART/USART status flags
#[enumflags2::bitflags]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[derive(Debug, Eq, PartialEq, Copy, Clone)]
#[repr(u32)]
pub enum Flag {
/// Parity error
ParityError = 1 << 0,
/// Framing error
FramingError = 1 << 1,
/// Noise detected flag
Noise = 1 << 2,
/// Overrun error
Overrun = 1 << 3,
/// IDLE line detected
Idle = 1 << 4,
/// Read data register not empty
RxNotEmpty = 1 << 5,
/// Transmission complete
TransmissionComplete = 1 << 6,
/// Transmit data register empty
TxEmpty = 1 << 7,
/// LIN break detection flag
LinBreak = 1 << 8,
/// CTS flag
Cts = 1 << 9,
}
/// UART clearable flags
#[enumflags2::bitflags]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[derive(Debug, Eq, PartialEq, Copy, Clone)]
#[repr(u32)]
pub enum CFlag {
/// Read data register not empty
RxNotEmpty = 1 << 5,
/// Transmission complete
TransmissionComplete = 1 << 6,
/// LIN break detection flag
LinBreak = 1 << 8,
}
pub mod config;
pub use config::Config;
/// A filler type for when the Tx pin is unnecessary
pub use gpio::NoPin as NoTx;
/// A filler type for when the Rx pin is unnecessary
pub use gpio::NoPin as NoRx;
pub use gpio::alt::SerialAsync as CommonPins;
/// Trait for [`Rx`] interrupt handling.
pub trait RxISR {
/// Return true if the line idle status is set
fn is_idle(&self) -> bool;
/// Return true if the rx register is not empty (and can be read)
fn is_rx_not_empty(&self) -> bool;
/// Clear idle line interrupt flag
fn clear_idle_interrupt(&self);
}
/// Trait for [`Tx`] interrupt handling.
pub trait TxISR {
/// Return true if the tx register is empty (and can accept data)
fn is_tx_empty(&self) -> bool;
}
/// Trait for listening [`Rx`] interrupt events.
pub trait RxListen {
/// Start listening for an rx not empty interrupt event
///
/// Note, you will also have to enable the corresponding interrupt
/// in the NVIC to start receiving events.
fn listen(&mut self);
/// Stop listening for the rx not empty interrupt event
fn unlisten(&mut self);
/// Start listening for a line idle interrupt event
///
/// Note, you will also have to enable the corresponding interrupt
/// in the NVIC to start receiving events.
fn listen_idle(&mut self);
/// Stop listening for the line idle interrupt event
fn unlisten_idle(&mut self);
}
/// Trait for listening [`Tx`] interrupt event.
pub trait TxListen {
/// Start listening for a tx empty interrupt event
///
/// Note, you will also have to enable the corresponding interrupt
/// in the NVIC to start receiving events.
fn listen(&mut self);
/// Stop listening for the tx empty interrupt event
fn unlisten(&mut self);
}
/// Serial abstraction
pub struct Serial<USART: CommonPins, WORD = u8> {
tx: Tx<USART, WORD>,
rx: Rx<USART, WORD>,
}
/// Serial receiver containing RX pin
pub struct Rx<USART: CommonPins, WORD = u8> {
_word: PhantomData<(USART, WORD)>,
pin: USART::Rx<PushPull>,
}
/// Serial transmitter containing TX pin
pub struct Tx<USART: CommonPins, WORD = u8> {
_word: PhantomData<WORD>,
usart: USART,
pin: USART::Tx<PushPull>,
}
pub trait SerialExt: Sized + Instance {
fn serial<WORD>(
self,
pins: (impl Into<Self::Tx<PushPull>>, impl Into<Self::Rx<PushPull>>),
config: impl Into<config::Config>,
clocks: &Clocks,
) -> Result<Serial<Self, WORD>, config::InvalidConfig>;
fn tx<WORD>(
self,
tx_pin: impl Into<Self::Tx<PushPull>>,
config: impl Into<config::Config>,
clocks: &Clocks,
) -> Result<Tx<Self, WORD>, config::InvalidConfig>
where
NoPin: Into<Self::Rx<PushPull>>;
fn rx<WORD>(
self,
rx_pin: impl Into<Self::Rx<PushPull>>,
config: impl Into<config::Config>,
clocks: &Clocks,
) -> Result<Rx<Self, WORD>, config::InvalidConfig>
where
NoPin: Into<Self::Tx<PushPull>>;
}
impl<USART: Instance, WORD> Serial<USART, WORD> {
pub fn new(
usart: USART,
pins: (
impl Into<USART::Tx<PushPull>>,
impl Into<USART::Rx<PushPull>>,
),
config: impl Into<config::Config>,
clocks: &Clocks,
) -> Result<Self, config::InvalidConfig>
where
<USART as Instance>::RegisterBlock: uart_impls::RegisterBlockImpl,
{
<USART as Instance>::RegisterBlock::new(usart, pins, config, clocks)
}
}
impl<UART: CommonPins, WORD> Serial<UART, WORD> {
pub fn split(self) -> (Tx<UART, WORD>, Rx<UART, WORD>) {
(self.tx, self.rx)
}
#[allow(clippy::type_complexity)]
pub fn release(self) -> (UART, (UART::Tx<PushPull>, UART::Rx<PushPull>)) {
(self.tx.usart, (self.tx.pin, self.rx.pin))
}
}
macro_rules! halUsart {
($USART:ty, $Serial:ident, $Rx:ident, $Tx:ident) => {
pub type $Serial<WORD = u8> = Serial<$USART, WORD>;
pub type $Tx<WORD = u8> = Tx<$USART, WORD>;
pub type $Rx<WORD = u8> = Rx<$USART, WORD>;
impl Instance for $USART {
type RegisterBlock = crate::serial::uart_impls::RegisterBlockUsart;
fn ptr() -> *const crate::serial::uart_impls::RegisterBlockUsart {
<$USART>::ptr() as *const _
}
fn set_stopbits(&self, bits: config::StopBits) {
use crate::pac::usart1::cr2::STOP_A;
use config::StopBits;
self.cr2.write(|w| {
w.stop().variant(match bits {
StopBits::STOP0P5 => STOP_A::Stop0p5,
StopBits::STOP1 => STOP_A::Stop1,
StopBits::STOP1P5 => STOP_A::Stop1p5,
StopBits::STOP2 => STOP_A::Stop2,
})
});
}
}
};
}
pub(crate) use halUsart;
halUsart! { pac::USART1, Serial1, Rx1, Tx1 }
halUsart! { pac::USART2, Serial2, Rx2, Tx2 }
halUsart! { pac::USART6, Serial6, Rx6, Tx6 }
#[cfg(feature = "usart3")]
halUsart! { pac::USART3, Serial3, Rx3, Tx3 }
impl<UART: CommonPins> Rx<UART, u8> {
pub(crate) fn with_u16_data(self) -> Rx<UART, u16> {
Rx::new(self.pin)
}
}
impl<UART: CommonPins> Rx<UART, u16> {
pub(crate) fn with_u8_data(self) -> Rx<UART, u8> {
Rx::new(self.pin)
}
}
impl<UART: CommonPins> Tx<UART, u8> {
pub(crate) fn with_u16_data(self) -> Tx<UART, u16> {
Tx::new(self.usart, self.pin)
}
}
impl<UART: CommonPins> Tx<UART, u16> {
pub(crate) fn with_u8_data(self) -> Tx<UART, u8> {
Tx::new(self.usart, self.pin)
}
}
impl<UART: CommonPins, WORD> Rx<UART, WORD> {
pub(crate) fn new(pin: UART::Rx<PushPull>) -> Self {
Self {
_word: PhantomData,
pin,
}
}
pub fn join(self, tx: Tx<UART, WORD>) -> Serial<UART, WORD> {
Serial { tx, rx: self }
}
}
impl<UART: CommonPins, WORD> Tx<UART, WORD> {
pub(crate) fn new(usart: UART, pin: UART::Tx<PushPull>) -> Self {
Self {
_word: PhantomData,
usart,
pin,
}
}
pub fn join(self, rx: Rx<UART, WORD>) -> Serial<UART, WORD> {
Serial { tx: self, rx }
}
}
impl<UART: Instance, WORD> AsRef<Tx<UART, WORD>> for Serial<UART, WORD> {
#[inline(always)]
fn as_ref(&self) -> &Tx<UART, WORD> {
&self.tx
}
}
impl<UART: Instance, WORD> AsRef<Rx<UART, WORD>> for Serial<UART, WORD> {
#[inline(always)]
fn as_ref(&self) -> &Rx<UART, WORD> {
&self.rx
}
}
impl<UART: Instance, WORD> AsMut<Tx<UART, WORD>> for Serial<UART, WORD> {
#[inline(always)]
fn as_mut(&mut self) -> &mut Tx<UART, WORD> {
&mut self.tx
}
}
impl<UART: Instance, WORD> AsMut<Rx<UART, WORD>> for Serial<UART, WORD> {
#[inline(always)]
fn as_mut(&mut self) -> &mut Rx<UART, WORD> {
&mut self.rx
}
}
impl<UART: Instance> Serial<UART, u8> {
/// Converts this Serial into a version that can read and write `u16` values instead of `u8`s
///
/// This can be used with a word length of 9 bits.
pub fn with_u16_data(self) -> Serial<UART, u16> {
Serial {
tx: self.tx.with_u16_data(),
rx: self.rx.with_u16_data(),
}
}
}
impl<UART: Instance> Serial<UART, u16> {
/// Converts this Serial into a version that can read and write `u8` values instead of `u16`s
///
/// This can be used with a word length of 8 bits.
pub fn with_u8_data(self) -> Serial<UART, u8> {
Serial {
tx: self.tx.with_u8_data(),
rx: self.rx.with_u8_data(),
}
}
}