#[repr(u8)]
pub enum PLLP_A {
DIV2,
DIV4,
DIV6,
DIV8,
}
Expand description
Main PLL (PLL) division factor for main system clock
Value on reset: 0
Variants
DIV2
0: PLLP=2
DIV4
1: PLLP=4
DIV6
2: PLLP=6
DIV8
3: PLLP=8
Trait Implementations
impl Copy for PLLP_A
impl StructuralPartialEq for PLLP_A
Auto Trait Implementations
impl RefUnwindSafe for PLLP_A
impl Send for PLLP_A
impl Sync for PLLP_A
impl Unpin for PLLP_A
impl UnwindSafe for PLLP_A
Blanket Implementations
sourceimpl<T> BorrowMut<T> for T where
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
const: unstable · sourcefn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more