[−][src]Struct stm32f429::otg_hs_device::RegisterBlock
Register block
Fields
otg_hs_dcfg: OTG_HS_DCFG
0x00 - OTG_HS device configuration register
otg_hs_dctl: OTG_HS_DCTL
0x04 - OTG_HS device control register
otg_hs_dsts: OTG_HS_DSTS
0x08 - OTG_HS device status register
otg_hs_diepmsk: OTG_HS_DIEPMSK
0x10 - OTG_HS device IN endpoint common interrupt mask register
otg_hs_doepmsk: OTG_HS_DOEPMSK
0x14 - OTG_HS device OUT endpoint common interrupt mask register
otg_hs_daint: OTG_HS_DAINT
0x18 - OTG_HS device all endpoints interrupt register
otg_hs_daintmsk: OTG_HS_DAINTMSK
0x1c - OTG_HS all endpoints interrupt mask register
otg_hs_dvbusdis: OTG_HS_DVBUSDIS
0x28 - OTG_HS device VBUS discharge time register
otg_hs_dvbuspulse: OTG_HS_DVBUSPULSE
0x2c - OTG_HS device VBUS pulsing time register
otg_hs_dthrctl: OTG_HS_DTHRCTL
0x30 - OTG_HS Device threshold control register
otg_hs_diepempmsk: OTG_HS_DIEPEMPMSK
0x34 - OTG_HS device IN endpoint FIFO empty interrupt mask register
otg_hs_deachint: OTG_HS_DEACHINT
0x38 - OTG_HS device each endpoint interrupt register
otg_hs_deachintmsk: OTG_HS_DEACHINTMSK
0x3c - OTG_HS device each endpoint interrupt register mask
otg_hs_diepeachmsk1: OTG_HS_DIEPEACHMSK1
0x40 - OTG_HS device each in endpoint-1 interrupt register
otg_hs_doepeachmsk1: OTG_HS_DOEPEACHMSK1
0x80 - OTG_HS device each OUT endpoint-1 interrupt register
otg_hs_diepctl0: OTG_HS_DIEPCTL0
0x100 - OTG device endpoint-0 control register
otg_hs_diepint0: OTG_HS_DIEPINT0
0x108 - OTG device endpoint-0 interrupt register
otg_hs_dieptsiz0: OTG_HS_DIEPTSIZ0
0x110 - OTG_HS device IN endpoint 0 transfer size register
otg_hs_diepdma1: OTG_HS_DIEPDMA1
0x114 - OTG_HS device endpoint-1 DMA address register
otg_hs_dtxfsts0: OTG_HS_DTXFSTS0
0x118 - OTG_HS device IN endpoint transmit FIFO status register
otg_hs_diepctl1: OTG_HS_DIEPCTL1
0x120 - OTG device endpoint-1 control register
otg_hs_diepint1: OTG_HS_DIEPINT1
0x128 - OTG device endpoint-1 interrupt register
otg_hs_dieptsiz1: OTG_HS_DIEPTSIZ1
0x130 - OTG_HS device endpoint transfer size register
otg_hs_diepdma2: OTG_HS_DIEPDMA2
0x134 - OTG_HS device endpoint-2 DMA address register
otg_hs_dtxfsts1: OTG_HS_DTXFSTS1
0x138 - OTG_HS device IN endpoint transmit FIFO status register
otg_hs_diepctl2: OTG_HS_DIEPCTL2
0x140 - OTG device endpoint-2 control register
otg_hs_diepint2: OTG_HS_DIEPINT2
0x148 - OTG device endpoint-2 interrupt register
otg_hs_dieptsiz2: OTG_HS_DIEPTSIZ2
0x150 - OTG_HS device endpoint transfer size register
otg_hs_diepdma3: OTG_HS_DIEPDMA3
0x154 - OTG_HS device endpoint-3 DMA address register
otg_hs_dtxfsts2: OTG_HS_DTXFSTS2
0x158 - OTG_HS device IN endpoint transmit FIFO status register
otg_hs_diepctl3: OTG_HS_DIEPCTL3
0x160 - OTG device endpoint-3 control register
otg_hs_diepint3: OTG_HS_DIEPINT3
0x168 - OTG device endpoint-3 interrupt register
otg_hs_dieptsiz3: OTG_HS_DIEPTSIZ3
0x170 - OTG_HS device endpoint transfer size register
otg_hs_diepdma4: OTG_HS_DIEPDMA4
0x174 - OTG_HS device endpoint-4 DMA address register
otg_hs_dtxfsts3: OTG_HS_DTXFSTS3
0x178 - OTG_HS device IN endpoint transmit FIFO status register
otg_hs_diepctl4: OTG_HS_DIEPCTL4
0x180 - OTG device endpoint-4 control register
otg_hs_diepint4: OTG_HS_DIEPINT4
0x188 - OTG device endpoint-4 interrupt register
otg_hs_dieptsiz4: OTG_HS_DIEPTSIZ4
0x190 - OTG_HS device endpoint transfer size register
otg_hs_diepdma5: OTG_HS_DIEPDMA5
0x194 - OTG_HS device endpoint-5 DMA address register
otg_hs_dtxfsts4: OTG_HS_DTXFSTS4
0x198 - OTG_HS device IN endpoint transmit FIFO status register
otg_hs_diepctl5: OTG_HS_DIEPCTL5
0x1a0 - OTG device endpoint-5 control register
otg_hs_diepint5: OTG_HS_DIEPINT5
0x1a8 - OTG device endpoint-5 interrupt register
otg_hs_dieptsiz5: OTG_HS_DIEPTSIZ5
0x1b0 - OTG_HS device endpoint transfer size register
otg_hs_dtxfsts5: OTG_HS_DTXFSTS5
0x1b8 - OTG_HS device IN endpoint transmit FIFO status register
otg_hs_diepctl6: OTG_HS_DIEPCTL6
0x1c0 - OTG device endpoint-6 control register
otg_hs_diepint6: OTG_HS_DIEPINT6
0x1c8 - OTG device endpoint-6 interrupt register
otg_hs_diepctl7: OTG_HS_DIEPCTL7
0x1e0 - OTG device endpoint-7 control register
otg_hs_diepint7: OTG_HS_DIEPINT7
0x1e8 - OTG device endpoint-7 interrupt register
otg_hs_doepctl0: OTG_HS_DOEPCTL0
0x300 - OTG_HS device control OUT endpoint 0 control register
otg_hs_doepint0: OTG_HS_DOEPINT0
0x308 - OTG_HS device endpoint-0 interrupt register
otg_hs_doeptsiz0: OTG_HS_DOEPTSIZ0
0x310 - OTG_HS device endpoint-1 transfer size register
otg_hs_doepctl1: OTG_HS_DOEPCTL1
0x320 - OTG device endpoint-1 control register
otg_hs_doepint1: OTG_HS_DOEPINT1
0x328 - OTG_HS device endpoint-1 interrupt register
otg_hs_doeptsiz1: OTG_HS_DOEPTSIZ1
0x330 - OTG_HS device endpoint-2 transfer size register
otg_hs_doepctl2: OTG_HS_DOEPCTL2
0x340 - OTG device endpoint-2 control register
otg_hs_doepint2: OTG_HS_DOEPINT2
0x348 - OTG_HS device endpoint-2 interrupt register
otg_hs_doeptsiz2: OTG_HS_DOEPTSIZ2
0x350 - OTG_HS device endpoint-3 transfer size register
otg_hs_doepctl3: OTG_HS_DOEPCTL3
0x360 - OTG device endpoint-3 control register
otg_hs_doepint3: OTG_HS_DOEPINT3
0x368 - OTG_HS device endpoint-3 interrupt register
otg_hs_doeptsiz3: OTG_HS_DOEPTSIZ3
0x370 - OTG_HS device endpoint-4 transfer size register
otg_hs_doepint4: OTG_HS_DOEPINT4
0x388 - OTG_HS device endpoint-4 interrupt register
otg_hs_doeptsiz4: OTG_HS_DOEPTSIZ4
0x390 - OTG_HS device endpoint-5 transfer size register
otg_hs_doepint5: OTG_HS_DOEPINT5
0x3a8 - OTG_HS device endpoint-5 interrupt register
otg_hs_doepint6: OTG_HS_DOEPINT6
0x3c8 - OTG_HS device endpoint-6 interrupt register
otg_hs_doepint7: OTG_HS_DOEPINT7
0x3e8 - OTG_HS device endpoint-7 interrupt register
Auto Trait Implementations
impl Send for RegisterBlock
impl !Sync for RegisterBlock
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try_from
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fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>
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impl<T> From for T
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impl<T, U> TryInto for T where
U: TryFrom<T>,
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U: TryFrom<T>,
type Error = <U as TryFrom<T>>::Error
try_from
)The type returned in the event of a conversion error.
fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>
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impl<T, U> Into for T where
U: From<T>,
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impl<T> Borrow for T where
T: ?Sized,
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