stm32f429/tim6/
egr.rs

1#[doc = r" Value to write to the register"]
2pub struct W {
3    bits: u32,
4}
5impl super::EGR {
6    #[doc = r" Writes to the register"]
7    #[inline]
8    pub fn write<F>(&self, f: F)
9    where
10        F: FnOnce(&mut W) -> &mut W,
11    {
12        let mut w = W::reset_value();
13        f(&mut w);
14        self.register.set(w.bits);
15    }
16}
17#[doc = r" Proxy"]
18pub struct _UGW<'a> {
19    w: &'a mut W,
20}
21impl<'a> _UGW<'a> {
22    #[doc = r" Sets the field bit"]
23    pub fn set_bit(self) -> &'a mut W {
24        self.bit(true)
25    }
26    #[doc = r" Clears the field bit"]
27    pub fn clear_bit(self) -> &'a mut W {
28        self.bit(false)
29    }
30    #[doc = r" Writes raw bits to the field"]
31    #[inline]
32    pub fn bit(self, value: bool) -> &'a mut W {
33        const MASK: bool = true;
34        const OFFSET: u8 = 0;
35        self.w.bits &= !((MASK as u32) << OFFSET);
36        self.w.bits |= ((value & MASK) as u32) << OFFSET;
37        self.w
38    }
39}
40impl W {
41    #[doc = r" Reset value of the register"]
42    #[inline]
43    pub fn reset_value() -> W {
44        W { bits: 0 }
45    }
46    #[doc = r" Writes raw bits to the register"]
47    #[inline]
48    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
49        self.bits = bits;
50        self
51    }
52    #[doc = "Bit 0 - Update generation"]
53    #[inline]
54    pub fn ug(&mut self) -> _UGW {
55        _UGW { w: self }
56    }
57}