1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::APB2ENR {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = r" Value of the field"]
46pub struct TIM1ENR {
47 bits: bool,
48}
49impl TIM1ENR {
50 #[doc = r" Value of the field as raw bits"]
51 #[inline]
52 pub fn bit(&self) -> bool {
53 self.bits
54 }
55 #[doc = r" Returns `true` if the bit is clear (0)"]
56 #[inline]
57 pub fn bit_is_clear(&self) -> bool {
58 !self.bit()
59 }
60 #[doc = r" Returns `true` if the bit is set (1)"]
61 #[inline]
62 pub fn bit_is_set(&self) -> bool {
63 self.bit()
64 }
65}
66#[doc = r" Value of the field"]
67pub struct TIM8ENR {
68 bits: bool,
69}
70impl TIM8ENR {
71 #[doc = r" Value of the field as raw bits"]
72 #[inline]
73 pub fn bit(&self) -> bool {
74 self.bits
75 }
76 #[doc = r" Returns `true` if the bit is clear (0)"]
77 #[inline]
78 pub fn bit_is_clear(&self) -> bool {
79 !self.bit()
80 }
81 #[doc = r" Returns `true` if the bit is set (1)"]
82 #[inline]
83 pub fn bit_is_set(&self) -> bool {
84 self.bit()
85 }
86}
87#[doc = r" Value of the field"]
88pub struct USART1ENR {
89 bits: bool,
90}
91impl USART1ENR {
92 #[doc = r" Value of the field as raw bits"]
93 #[inline]
94 pub fn bit(&self) -> bool {
95 self.bits
96 }
97 #[doc = r" Returns `true` if the bit is clear (0)"]
98 #[inline]
99 pub fn bit_is_clear(&self) -> bool {
100 !self.bit()
101 }
102 #[doc = r" Returns `true` if the bit is set (1)"]
103 #[inline]
104 pub fn bit_is_set(&self) -> bool {
105 self.bit()
106 }
107}
108#[doc = r" Value of the field"]
109pub struct USART6ENR {
110 bits: bool,
111}
112impl USART6ENR {
113 #[doc = r" Value of the field as raw bits"]
114 #[inline]
115 pub fn bit(&self) -> bool {
116 self.bits
117 }
118 #[doc = r" Returns `true` if the bit is clear (0)"]
119 #[inline]
120 pub fn bit_is_clear(&self) -> bool {
121 !self.bit()
122 }
123 #[doc = r" Returns `true` if the bit is set (1)"]
124 #[inline]
125 pub fn bit_is_set(&self) -> bool {
126 self.bit()
127 }
128}
129#[doc = r" Value of the field"]
130pub struct ADC1ENR {
131 bits: bool,
132}
133impl ADC1ENR {
134 #[doc = r" Value of the field as raw bits"]
135 #[inline]
136 pub fn bit(&self) -> bool {
137 self.bits
138 }
139 #[doc = r" Returns `true` if the bit is clear (0)"]
140 #[inline]
141 pub fn bit_is_clear(&self) -> bool {
142 !self.bit()
143 }
144 #[doc = r" Returns `true` if the bit is set (1)"]
145 #[inline]
146 pub fn bit_is_set(&self) -> bool {
147 self.bit()
148 }
149}
150#[doc = r" Value of the field"]
151pub struct ADC2ENR {
152 bits: bool,
153}
154impl ADC2ENR {
155 #[doc = r" Value of the field as raw bits"]
156 #[inline]
157 pub fn bit(&self) -> bool {
158 self.bits
159 }
160 #[doc = r" Returns `true` if the bit is clear (0)"]
161 #[inline]
162 pub fn bit_is_clear(&self) -> bool {
163 !self.bit()
164 }
165 #[doc = r" Returns `true` if the bit is set (1)"]
166 #[inline]
167 pub fn bit_is_set(&self) -> bool {
168 self.bit()
169 }
170}
171#[doc = r" Value of the field"]
172pub struct ADC3ENR {
173 bits: bool,
174}
175impl ADC3ENR {
176 #[doc = r" Value of the field as raw bits"]
177 #[inline]
178 pub fn bit(&self) -> bool {
179 self.bits
180 }
181 #[doc = r" Returns `true` if the bit is clear (0)"]
182 #[inline]
183 pub fn bit_is_clear(&self) -> bool {
184 !self.bit()
185 }
186 #[doc = r" Returns `true` if the bit is set (1)"]
187 #[inline]
188 pub fn bit_is_set(&self) -> bool {
189 self.bit()
190 }
191}
192#[doc = r" Value of the field"]
193pub struct SDIOENR {
194 bits: bool,
195}
196impl SDIOENR {
197 #[doc = r" Value of the field as raw bits"]
198 #[inline]
199 pub fn bit(&self) -> bool {
200 self.bits
201 }
202 #[doc = r" Returns `true` if the bit is clear (0)"]
203 #[inline]
204 pub fn bit_is_clear(&self) -> bool {
205 !self.bit()
206 }
207 #[doc = r" Returns `true` if the bit is set (1)"]
208 #[inline]
209 pub fn bit_is_set(&self) -> bool {
210 self.bit()
211 }
212}
213#[doc = r" Value of the field"]
214pub struct SPI1ENR {
215 bits: bool,
216}
217impl SPI1ENR {
218 #[doc = r" Value of the field as raw bits"]
219 #[inline]
220 pub fn bit(&self) -> bool {
221 self.bits
222 }
223 #[doc = r" Returns `true` if the bit is clear (0)"]
224 #[inline]
225 pub fn bit_is_clear(&self) -> bool {
226 !self.bit()
227 }
228 #[doc = r" Returns `true` if the bit is set (1)"]
229 #[inline]
230 pub fn bit_is_set(&self) -> bool {
231 self.bit()
232 }
233}
234#[doc = r" Value of the field"]
235pub struct SPI4ENR {
236 bits: bool,
237}
238impl SPI4ENR {
239 #[doc = r" Value of the field as raw bits"]
240 #[inline]
241 pub fn bit(&self) -> bool {
242 self.bits
243 }
244 #[doc = r" Returns `true` if the bit is clear (0)"]
245 #[inline]
246 pub fn bit_is_clear(&self) -> bool {
247 !self.bit()
248 }
249 #[doc = r" Returns `true` if the bit is set (1)"]
250 #[inline]
251 pub fn bit_is_set(&self) -> bool {
252 self.bit()
253 }
254}
255#[doc = r" Value of the field"]
256pub struct SYSCFGENR {
257 bits: bool,
258}
259impl SYSCFGENR {
260 #[doc = r" Value of the field as raw bits"]
261 #[inline]
262 pub fn bit(&self) -> bool {
263 self.bits
264 }
265 #[doc = r" Returns `true` if the bit is clear (0)"]
266 #[inline]
267 pub fn bit_is_clear(&self) -> bool {
268 !self.bit()
269 }
270 #[doc = r" Returns `true` if the bit is set (1)"]
271 #[inline]
272 pub fn bit_is_set(&self) -> bool {
273 self.bit()
274 }
275}
276#[doc = r" Value of the field"]
277pub struct TIM9ENR {
278 bits: bool,
279}
280impl TIM9ENR {
281 #[doc = r" Value of the field as raw bits"]
282 #[inline]
283 pub fn bit(&self) -> bool {
284 self.bits
285 }
286 #[doc = r" Returns `true` if the bit is clear (0)"]
287 #[inline]
288 pub fn bit_is_clear(&self) -> bool {
289 !self.bit()
290 }
291 #[doc = r" Returns `true` if the bit is set (1)"]
292 #[inline]
293 pub fn bit_is_set(&self) -> bool {
294 self.bit()
295 }
296}
297#[doc = r" Value of the field"]
298pub struct TIM10ENR {
299 bits: bool,
300}
301impl TIM10ENR {
302 #[doc = r" Value of the field as raw bits"]
303 #[inline]
304 pub fn bit(&self) -> bool {
305 self.bits
306 }
307 #[doc = r" Returns `true` if the bit is clear (0)"]
308 #[inline]
309 pub fn bit_is_clear(&self) -> bool {
310 !self.bit()
311 }
312 #[doc = r" Returns `true` if the bit is set (1)"]
313 #[inline]
314 pub fn bit_is_set(&self) -> bool {
315 self.bit()
316 }
317}
318#[doc = r" Value of the field"]
319pub struct TIM11ENR {
320 bits: bool,
321}
322impl TIM11ENR {
323 #[doc = r" Value of the field as raw bits"]
324 #[inline]
325 pub fn bit(&self) -> bool {
326 self.bits
327 }
328 #[doc = r" Returns `true` if the bit is clear (0)"]
329 #[inline]
330 pub fn bit_is_clear(&self) -> bool {
331 !self.bit()
332 }
333 #[doc = r" Returns `true` if the bit is set (1)"]
334 #[inline]
335 pub fn bit_is_set(&self) -> bool {
336 self.bit()
337 }
338}
339#[doc = r" Value of the field"]
340pub struct SPI5ENR {
341 bits: bool,
342}
343impl SPI5ENR {
344 #[doc = r" Value of the field as raw bits"]
345 #[inline]
346 pub fn bit(&self) -> bool {
347 self.bits
348 }
349 #[doc = r" Returns `true` if the bit is clear (0)"]
350 #[inline]
351 pub fn bit_is_clear(&self) -> bool {
352 !self.bit()
353 }
354 #[doc = r" Returns `true` if the bit is set (1)"]
355 #[inline]
356 pub fn bit_is_set(&self) -> bool {
357 self.bit()
358 }
359}
360#[doc = r" Value of the field"]
361pub struct SPI6ENR {
362 bits: bool,
363}
364impl SPI6ENR {
365 #[doc = r" Value of the field as raw bits"]
366 #[inline]
367 pub fn bit(&self) -> bool {
368 self.bits
369 }
370 #[doc = r" Returns `true` if the bit is clear (0)"]
371 #[inline]
372 pub fn bit_is_clear(&self) -> bool {
373 !self.bit()
374 }
375 #[doc = r" Returns `true` if the bit is set (1)"]
376 #[inline]
377 pub fn bit_is_set(&self) -> bool {
378 self.bit()
379 }
380}
381#[doc = r" Value of the field"]
382pub struct SAI1ENR {
383 bits: bool,
384}
385impl SAI1ENR {
386 #[doc = r" Value of the field as raw bits"]
387 #[inline]
388 pub fn bit(&self) -> bool {
389 self.bits
390 }
391 #[doc = r" Returns `true` if the bit is clear (0)"]
392 #[inline]
393 pub fn bit_is_clear(&self) -> bool {
394 !self.bit()
395 }
396 #[doc = r" Returns `true` if the bit is set (1)"]
397 #[inline]
398 pub fn bit_is_set(&self) -> bool {
399 self.bit()
400 }
401}
402#[doc = r" Value of the field"]
403pub struct LTDCENR {
404 bits: bool,
405}
406impl LTDCENR {
407 #[doc = r" Value of the field as raw bits"]
408 #[inline]
409 pub fn bit(&self) -> bool {
410 self.bits
411 }
412 #[doc = r" Returns `true` if the bit is clear (0)"]
413 #[inline]
414 pub fn bit_is_clear(&self) -> bool {
415 !self.bit()
416 }
417 #[doc = r" Returns `true` if the bit is set (1)"]
418 #[inline]
419 pub fn bit_is_set(&self) -> bool {
420 self.bit()
421 }
422}
423#[doc = r" Proxy"]
424pub struct _TIM1ENW<'a> {
425 w: &'a mut W,
426}
427impl<'a> _TIM1ENW<'a> {
428 #[doc = r" Sets the field bit"]
429 pub fn set_bit(self) -> &'a mut W {
430 self.bit(true)
431 }
432 #[doc = r" Clears the field bit"]
433 pub fn clear_bit(self) -> &'a mut W {
434 self.bit(false)
435 }
436 #[doc = r" Writes raw bits to the field"]
437 #[inline]
438 pub fn bit(self, value: bool) -> &'a mut W {
439 const MASK: bool = true;
440 const OFFSET: u8 = 0;
441 self.w.bits &= !((MASK as u32) << OFFSET);
442 self.w.bits |= ((value & MASK) as u32) << OFFSET;
443 self.w
444 }
445}
446#[doc = r" Proxy"]
447pub struct _TIM8ENW<'a> {
448 w: &'a mut W,
449}
450impl<'a> _TIM8ENW<'a> {
451 #[doc = r" Sets the field bit"]
452 pub fn set_bit(self) -> &'a mut W {
453 self.bit(true)
454 }
455 #[doc = r" Clears the field bit"]
456 pub fn clear_bit(self) -> &'a mut W {
457 self.bit(false)
458 }
459 #[doc = r" Writes raw bits to the field"]
460 #[inline]
461 pub fn bit(self, value: bool) -> &'a mut W {
462 const MASK: bool = true;
463 const OFFSET: u8 = 1;
464 self.w.bits &= !((MASK as u32) << OFFSET);
465 self.w.bits |= ((value & MASK) as u32) << OFFSET;
466 self.w
467 }
468}
469#[doc = r" Proxy"]
470pub struct _USART1ENW<'a> {
471 w: &'a mut W,
472}
473impl<'a> _USART1ENW<'a> {
474 #[doc = r" Sets the field bit"]
475 pub fn set_bit(self) -> &'a mut W {
476 self.bit(true)
477 }
478 #[doc = r" Clears the field bit"]
479 pub fn clear_bit(self) -> &'a mut W {
480 self.bit(false)
481 }
482 #[doc = r" Writes raw bits to the field"]
483 #[inline]
484 pub fn bit(self, value: bool) -> &'a mut W {
485 const MASK: bool = true;
486 const OFFSET: u8 = 4;
487 self.w.bits &= !((MASK as u32) << OFFSET);
488 self.w.bits |= ((value & MASK) as u32) << OFFSET;
489 self.w
490 }
491}
492#[doc = r" Proxy"]
493pub struct _USART6ENW<'a> {
494 w: &'a mut W,
495}
496impl<'a> _USART6ENW<'a> {
497 #[doc = r" Sets the field bit"]
498 pub fn set_bit(self) -> &'a mut W {
499 self.bit(true)
500 }
501 #[doc = r" Clears the field bit"]
502 pub fn clear_bit(self) -> &'a mut W {
503 self.bit(false)
504 }
505 #[doc = r" Writes raw bits to the field"]
506 #[inline]
507 pub fn bit(self, value: bool) -> &'a mut W {
508 const MASK: bool = true;
509 const OFFSET: u8 = 5;
510 self.w.bits &= !((MASK as u32) << OFFSET);
511 self.w.bits |= ((value & MASK) as u32) << OFFSET;
512 self.w
513 }
514}
515#[doc = r" Proxy"]
516pub struct _ADC1ENW<'a> {
517 w: &'a mut W,
518}
519impl<'a> _ADC1ENW<'a> {
520 #[doc = r" Sets the field bit"]
521 pub fn set_bit(self) -> &'a mut W {
522 self.bit(true)
523 }
524 #[doc = r" Clears the field bit"]
525 pub fn clear_bit(self) -> &'a mut W {
526 self.bit(false)
527 }
528 #[doc = r" Writes raw bits to the field"]
529 #[inline]
530 pub fn bit(self, value: bool) -> &'a mut W {
531 const MASK: bool = true;
532 const OFFSET: u8 = 8;
533 self.w.bits &= !((MASK as u32) << OFFSET);
534 self.w.bits |= ((value & MASK) as u32) << OFFSET;
535 self.w
536 }
537}
538#[doc = r" Proxy"]
539pub struct _ADC2ENW<'a> {
540 w: &'a mut W,
541}
542impl<'a> _ADC2ENW<'a> {
543 #[doc = r" Sets the field bit"]
544 pub fn set_bit(self) -> &'a mut W {
545 self.bit(true)
546 }
547 #[doc = r" Clears the field bit"]
548 pub fn clear_bit(self) -> &'a mut W {
549 self.bit(false)
550 }
551 #[doc = r" Writes raw bits to the field"]
552 #[inline]
553 pub fn bit(self, value: bool) -> &'a mut W {
554 const MASK: bool = true;
555 const OFFSET: u8 = 9;
556 self.w.bits &= !((MASK as u32) << OFFSET);
557 self.w.bits |= ((value & MASK) as u32) << OFFSET;
558 self.w
559 }
560}
561#[doc = r" Proxy"]
562pub struct _ADC3ENW<'a> {
563 w: &'a mut W,
564}
565impl<'a> _ADC3ENW<'a> {
566 #[doc = r" Sets the field bit"]
567 pub fn set_bit(self) -> &'a mut W {
568 self.bit(true)
569 }
570 #[doc = r" Clears the field bit"]
571 pub fn clear_bit(self) -> &'a mut W {
572 self.bit(false)
573 }
574 #[doc = r" Writes raw bits to the field"]
575 #[inline]
576 pub fn bit(self, value: bool) -> &'a mut W {
577 const MASK: bool = true;
578 const OFFSET: u8 = 10;
579 self.w.bits &= !((MASK as u32) << OFFSET);
580 self.w.bits |= ((value & MASK) as u32) << OFFSET;
581 self.w
582 }
583}
584#[doc = r" Proxy"]
585pub struct _SDIOENW<'a> {
586 w: &'a mut W,
587}
588impl<'a> _SDIOENW<'a> {
589 #[doc = r" Sets the field bit"]
590 pub fn set_bit(self) -> &'a mut W {
591 self.bit(true)
592 }
593 #[doc = r" Clears the field bit"]
594 pub fn clear_bit(self) -> &'a mut W {
595 self.bit(false)
596 }
597 #[doc = r" Writes raw bits to the field"]
598 #[inline]
599 pub fn bit(self, value: bool) -> &'a mut W {
600 const MASK: bool = true;
601 const OFFSET: u8 = 11;
602 self.w.bits &= !((MASK as u32) << OFFSET);
603 self.w.bits |= ((value & MASK) as u32) << OFFSET;
604 self.w
605 }
606}
607#[doc = r" Proxy"]
608pub struct _SPI1ENW<'a> {
609 w: &'a mut W,
610}
611impl<'a> _SPI1ENW<'a> {
612 #[doc = r" Sets the field bit"]
613 pub fn set_bit(self) -> &'a mut W {
614 self.bit(true)
615 }
616 #[doc = r" Clears the field bit"]
617 pub fn clear_bit(self) -> &'a mut W {
618 self.bit(false)
619 }
620 #[doc = r" Writes raw bits to the field"]
621 #[inline]
622 pub fn bit(self, value: bool) -> &'a mut W {
623 const MASK: bool = true;
624 const OFFSET: u8 = 12;
625 self.w.bits &= !((MASK as u32) << OFFSET);
626 self.w.bits |= ((value & MASK) as u32) << OFFSET;
627 self.w
628 }
629}
630#[doc = r" Proxy"]
631pub struct _SPI4ENW<'a> {
632 w: &'a mut W,
633}
634impl<'a> _SPI4ENW<'a> {
635 #[doc = r" Sets the field bit"]
636 pub fn set_bit(self) -> &'a mut W {
637 self.bit(true)
638 }
639 #[doc = r" Clears the field bit"]
640 pub fn clear_bit(self) -> &'a mut W {
641 self.bit(false)
642 }
643 #[doc = r" Writes raw bits to the field"]
644 #[inline]
645 pub fn bit(self, value: bool) -> &'a mut W {
646 const MASK: bool = true;
647 const OFFSET: u8 = 13;
648 self.w.bits &= !((MASK as u32) << OFFSET);
649 self.w.bits |= ((value & MASK) as u32) << OFFSET;
650 self.w
651 }
652}
653#[doc = r" Proxy"]
654pub struct _SYSCFGENW<'a> {
655 w: &'a mut W,
656}
657impl<'a> _SYSCFGENW<'a> {
658 #[doc = r" Sets the field bit"]
659 pub fn set_bit(self) -> &'a mut W {
660 self.bit(true)
661 }
662 #[doc = r" Clears the field bit"]
663 pub fn clear_bit(self) -> &'a mut W {
664 self.bit(false)
665 }
666 #[doc = r" Writes raw bits to the field"]
667 #[inline]
668 pub fn bit(self, value: bool) -> &'a mut W {
669 const MASK: bool = true;
670 const OFFSET: u8 = 14;
671 self.w.bits &= !((MASK as u32) << OFFSET);
672 self.w.bits |= ((value & MASK) as u32) << OFFSET;
673 self.w
674 }
675}
676#[doc = r" Proxy"]
677pub struct _TIM9ENW<'a> {
678 w: &'a mut W,
679}
680impl<'a> _TIM9ENW<'a> {
681 #[doc = r" Sets the field bit"]
682 pub fn set_bit(self) -> &'a mut W {
683 self.bit(true)
684 }
685 #[doc = r" Clears the field bit"]
686 pub fn clear_bit(self) -> &'a mut W {
687 self.bit(false)
688 }
689 #[doc = r" Writes raw bits to the field"]
690 #[inline]
691 pub fn bit(self, value: bool) -> &'a mut W {
692 const MASK: bool = true;
693 const OFFSET: u8 = 16;
694 self.w.bits &= !((MASK as u32) << OFFSET);
695 self.w.bits |= ((value & MASK) as u32) << OFFSET;
696 self.w
697 }
698}
699#[doc = r" Proxy"]
700pub struct _TIM10ENW<'a> {
701 w: &'a mut W,
702}
703impl<'a> _TIM10ENW<'a> {
704 #[doc = r" Sets the field bit"]
705 pub fn set_bit(self) -> &'a mut W {
706 self.bit(true)
707 }
708 #[doc = r" Clears the field bit"]
709 pub fn clear_bit(self) -> &'a mut W {
710 self.bit(false)
711 }
712 #[doc = r" Writes raw bits to the field"]
713 #[inline]
714 pub fn bit(self, value: bool) -> &'a mut W {
715 const MASK: bool = true;
716 const OFFSET: u8 = 17;
717 self.w.bits &= !((MASK as u32) << OFFSET);
718 self.w.bits |= ((value & MASK) as u32) << OFFSET;
719 self.w
720 }
721}
722#[doc = r" Proxy"]
723pub struct _TIM11ENW<'a> {
724 w: &'a mut W,
725}
726impl<'a> _TIM11ENW<'a> {
727 #[doc = r" Sets the field bit"]
728 pub fn set_bit(self) -> &'a mut W {
729 self.bit(true)
730 }
731 #[doc = r" Clears the field bit"]
732 pub fn clear_bit(self) -> &'a mut W {
733 self.bit(false)
734 }
735 #[doc = r" Writes raw bits to the field"]
736 #[inline]
737 pub fn bit(self, value: bool) -> &'a mut W {
738 const MASK: bool = true;
739 const OFFSET: u8 = 18;
740 self.w.bits &= !((MASK as u32) << OFFSET);
741 self.w.bits |= ((value & MASK) as u32) << OFFSET;
742 self.w
743 }
744}
745#[doc = r" Proxy"]
746pub struct _SPI5ENW<'a> {
747 w: &'a mut W,
748}
749impl<'a> _SPI5ENW<'a> {
750 #[doc = r" Sets the field bit"]
751 pub fn set_bit(self) -> &'a mut W {
752 self.bit(true)
753 }
754 #[doc = r" Clears the field bit"]
755 pub fn clear_bit(self) -> &'a mut W {
756 self.bit(false)
757 }
758 #[doc = r" Writes raw bits to the field"]
759 #[inline]
760 pub fn bit(self, value: bool) -> &'a mut W {
761 const MASK: bool = true;
762 const OFFSET: u8 = 20;
763 self.w.bits &= !((MASK as u32) << OFFSET);
764 self.w.bits |= ((value & MASK) as u32) << OFFSET;
765 self.w
766 }
767}
768#[doc = r" Proxy"]
769pub struct _SPI6ENW<'a> {
770 w: &'a mut W,
771}
772impl<'a> _SPI6ENW<'a> {
773 #[doc = r" Sets the field bit"]
774 pub fn set_bit(self) -> &'a mut W {
775 self.bit(true)
776 }
777 #[doc = r" Clears the field bit"]
778 pub fn clear_bit(self) -> &'a mut W {
779 self.bit(false)
780 }
781 #[doc = r" Writes raw bits to the field"]
782 #[inline]
783 pub fn bit(self, value: bool) -> &'a mut W {
784 const MASK: bool = true;
785 const OFFSET: u8 = 21;
786 self.w.bits &= !((MASK as u32) << OFFSET);
787 self.w.bits |= ((value & MASK) as u32) << OFFSET;
788 self.w
789 }
790}
791#[doc = r" Proxy"]
792pub struct _SAI1ENW<'a> {
793 w: &'a mut W,
794}
795impl<'a> _SAI1ENW<'a> {
796 #[doc = r" Sets the field bit"]
797 pub fn set_bit(self) -> &'a mut W {
798 self.bit(true)
799 }
800 #[doc = r" Clears the field bit"]
801 pub fn clear_bit(self) -> &'a mut W {
802 self.bit(false)
803 }
804 #[doc = r" Writes raw bits to the field"]
805 #[inline]
806 pub fn bit(self, value: bool) -> &'a mut W {
807 const MASK: bool = true;
808 const OFFSET: u8 = 22;
809 self.w.bits &= !((MASK as u32) << OFFSET);
810 self.w.bits |= ((value & MASK) as u32) << OFFSET;
811 self.w
812 }
813}
814#[doc = r" Proxy"]
815pub struct _LTDCENW<'a> {
816 w: &'a mut W,
817}
818impl<'a> _LTDCENW<'a> {
819 #[doc = r" Sets the field bit"]
820 pub fn set_bit(self) -> &'a mut W {
821 self.bit(true)
822 }
823 #[doc = r" Clears the field bit"]
824 pub fn clear_bit(self) -> &'a mut W {
825 self.bit(false)
826 }
827 #[doc = r" Writes raw bits to the field"]
828 #[inline]
829 pub fn bit(self, value: bool) -> &'a mut W {
830 const MASK: bool = true;
831 const OFFSET: u8 = 26;
832 self.w.bits &= !((MASK as u32) << OFFSET);
833 self.w.bits |= ((value & MASK) as u32) << OFFSET;
834 self.w
835 }
836}
837impl R {
838 #[doc = r" Value of the register as raw bits"]
839 #[inline]
840 pub fn bits(&self) -> u32 {
841 self.bits
842 }
843 #[doc = "Bit 0 - TIM1 clock enable"]
844 #[inline]
845 pub fn tim1en(&self) -> TIM1ENR {
846 let bits = {
847 const MASK: bool = true;
848 const OFFSET: u8 = 0;
849 ((self.bits >> OFFSET) & MASK as u32) != 0
850 };
851 TIM1ENR { bits }
852 }
853 #[doc = "Bit 1 - TIM8 clock enable"]
854 #[inline]
855 pub fn tim8en(&self) -> TIM8ENR {
856 let bits = {
857 const MASK: bool = true;
858 const OFFSET: u8 = 1;
859 ((self.bits >> OFFSET) & MASK as u32) != 0
860 };
861 TIM8ENR { bits }
862 }
863 #[doc = "Bit 4 - USART1 clock enable"]
864 #[inline]
865 pub fn usart1en(&self) -> USART1ENR {
866 let bits = {
867 const MASK: bool = true;
868 const OFFSET: u8 = 4;
869 ((self.bits >> OFFSET) & MASK as u32) != 0
870 };
871 USART1ENR { bits }
872 }
873 #[doc = "Bit 5 - USART6 clock enable"]
874 #[inline]
875 pub fn usart6en(&self) -> USART6ENR {
876 let bits = {
877 const MASK: bool = true;
878 const OFFSET: u8 = 5;
879 ((self.bits >> OFFSET) & MASK as u32) != 0
880 };
881 USART6ENR { bits }
882 }
883 #[doc = "Bit 8 - ADC1 clock enable"]
884 #[inline]
885 pub fn adc1en(&self) -> ADC1ENR {
886 let bits = {
887 const MASK: bool = true;
888 const OFFSET: u8 = 8;
889 ((self.bits >> OFFSET) & MASK as u32) != 0
890 };
891 ADC1ENR { bits }
892 }
893 #[doc = "Bit 9 - ADC2 clock enable"]
894 #[inline]
895 pub fn adc2en(&self) -> ADC2ENR {
896 let bits = {
897 const MASK: bool = true;
898 const OFFSET: u8 = 9;
899 ((self.bits >> OFFSET) & MASK as u32) != 0
900 };
901 ADC2ENR { bits }
902 }
903 #[doc = "Bit 10 - ADC3 clock enable"]
904 #[inline]
905 pub fn adc3en(&self) -> ADC3ENR {
906 let bits = {
907 const MASK: bool = true;
908 const OFFSET: u8 = 10;
909 ((self.bits >> OFFSET) & MASK as u32) != 0
910 };
911 ADC3ENR { bits }
912 }
913 #[doc = "Bit 11 - SDIO clock enable"]
914 #[inline]
915 pub fn sdioen(&self) -> SDIOENR {
916 let bits = {
917 const MASK: bool = true;
918 const OFFSET: u8 = 11;
919 ((self.bits >> OFFSET) & MASK as u32) != 0
920 };
921 SDIOENR { bits }
922 }
923 #[doc = "Bit 12 - SPI1 clock enable"]
924 #[inline]
925 pub fn spi1en(&self) -> SPI1ENR {
926 let bits = {
927 const MASK: bool = true;
928 const OFFSET: u8 = 12;
929 ((self.bits >> OFFSET) & MASK as u32) != 0
930 };
931 SPI1ENR { bits }
932 }
933 #[doc = "Bit 13 - SPI4 clock enable"]
934 #[inline]
935 pub fn spi4en(&self) -> SPI4ENR {
936 let bits = {
937 const MASK: bool = true;
938 const OFFSET: u8 = 13;
939 ((self.bits >> OFFSET) & MASK as u32) != 0
940 };
941 SPI4ENR { bits }
942 }
943 #[doc = "Bit 14 - System configuration controller clock enable"]
944 #[inline]
945 pub fn syscfgen(&self) -> SYSCFGENR {
946 let bits = {
947 const MASK: bool = true;
948 const OFFSET: u8 = 14;
949 ((self.bits >> OFFSET) & MASK as u32) != 0
950 };
951 SYSCFGENR { bits }
952 }
953 #[doc = "Bit 16 - TIM9 clock enable"]
954 #[inline]
955 pub fn tim9en(&self) -> TIM9ENR {
956 let bits = {
957 const MASK: bool = true;
958 const OFFSET: u8 = 16;
959 ((self.bits >> OFFSET) & MASK as u32) != 0
960 };
961 TIM9ENR { bits }
962 }
963 #[doc = "Bit 17 - TIM10 clock enable"]
964 #[inline]
965 pub fn tim10en(&self) -> TIM10ENR {
966 let bits = {
967 const MASK: bool = true;
968 const OFFSET: u8 = 17;
969 ((self.bits >> OFFSET) & MASK as u32) != 0
970 };
971 TIM10ENR { bits }
972 }
973 #[doc = "Bit 18 - TIM11 clock enable"]
974 #[inline]
975 pub fn tim11en(&self) -> TIM11ENR {
976 let bits = {
977 const MASK: bool = true;
978 const OFFSET: u8 = 18;
979 ((self.bits >> OFFSET) & MASK as u32) != 0
980 };
981 TIM11ENR { bits }
982 }
983 #[doc = "Bit 20 - SPI5 clock enable"]
984 #[inline]
985 pub fn spi5en(&self) -> SPI5ENR {
986 let bits = {
987 const MASK: bool = true;
988 const OFFSET: u8 = 20;
989 ((self.bits >> OFFSET) & MASK as u32) != 0
990 };
991 SPI5ENR { bits }
992 }
993 #[doc = "Bit 21 - SPI6 clock enable"]
994 #[inline]
995 pub fn spi6en(&self) -> SPI6ENR {
996 let bits = {
997 const MASK: bool = true;
998 const OFFSET: u8 = 21;
999 ((self.bits >> OFFSET) & MASK as u32) != 0
1000 };
1001 SPI6ENR { bits }
1002 }
1003 #[doc = "Bit 22 - SAI1 clock enable"]
1004 #[inline]
1005 pub fn sai1en(&self) -> SAI1ENR {
1006 let bits = {
1007 const MASK: bool = true;
1008 const OFFSET: u8 = 22;
1009 ((self.bits >> OFFSET) & MASK as u32) != 0
1010 };
1011 SAI1ENR { bits }
1012 }
1013 #[doc = "Bit 26 - LTDC clock enable"]
1014 #[inline]
1015 pub fn ltdcen(&self) -> LTDCENR {
1016 let bits = {
1017 const MASK: bool = true;
1018 const OFFSET: u8 = 26;
1019 ((self.bits >> OFFSET) & MASK as u32) != 0
1020 };
1021 LTDCENR { bits }
1022 }
1023}
1024impl W {
1025 #[doc = r" Reset value of the register"]
1026 #[inline]
1027 pub fn reset_value() -> W {
1028 W { bits: 0 }
1029 }
1030 #[doc = r" Writes raw bits to the register"]
1031 #[inline]
1032 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
1033 self.bits = bits;
1034 self
1035 }
1036 #[doc = "Bit 0 - TIM1 clock enable"]
1037 #[inline]
1038 pub fn tim1en(&mut self) -> _TIM1ENW {
1039 _TIM1ENW { w: self }
1040 }
1041 #[doc = "Bit 1 - TIM8 clock enable"]
1042 #[inline]
1043 pub fn tim8en(&mut self) -> _TIM8ENW {
1044 _TIM8ENW { w: self }
1045 }
1046 #[doc = "Bit 4 - USART1 clock enable"]
1047 #[inline]
1048 pub fn usart1en(&mut self) -> _USART1ENW {
1049 _USART1ENW { w: self }
1050 }
1051 #[doc = "Bit 5 - USART6 clock enable"]
1052 #[inline]
1053 pub fn usart6en(&mut self) -> _USART6ENW {
1054 _USART6ENW { w: self }
1055 }
1056 #[doc = "Bit 8 - ADC1 clock enable"]
1057 #[inline]
1058 pub fn adc1en(&mut self) -> _ADC1ENW {
1059 _ADC1ENW { w: self }
1060 }
1061 #[doc = "Bit 9 - ADC2 clock enable"]
1062 #[inline]
1063 pub fn adc2en(&mut self) -> _ADC2ENW {
1064 _ADC2ENW { w: self }
1065 }
1066 #[doc = "Bit 10 - ADC3 clock enable"]
1067 #[inline]
1068 pub fn adc3en(&mut self) -> _ADC3ENW {
1069 _ADC3ENW { w: self }
1070 }
1071 #[doc = "Bit 11 - SDIO clock enable"]
1072 #[inline]
1073 pub fn sdioen(&mut self) -> _SDIOENW {
1074 _SDIOENW { w: self }
1075 }
1076 #[doc = "Bit 12 - SPI1 clock enable"]
1077 #[inline]
1078 pub fn spi1en(&mut self) -> _SPI1ENW {
1079 _SPI1ENW { w: self }
1080 }
1081 #[doc = "Bit 13 - SPI4 clock enable"]
1082 #[inline]
1083 pub fn spi4en(&mut self) -> _SPI4ENW {
1084 _SPI4ENW { w: self }
1085 }
1086 #[doc = "Bit 14 - System configuration controller clock enable"]
1087 #[inline]
1088 pub fn syscfgen(&mut self) -> _SYSCFGENW {
1089 _SYSCFGENW { w: self }
1090 }
1091 #[doc = "Bit 16 - TIM9 clock enable"]
1092 #[inline]
1093 pub fn tim9en(&mut self) -> _TIM9ENW {
1094 _TIM9ENW { w: self }
1095 }
1096 #[doc = "Bit 17 - TIM10 clock enable"]
1097 #[inline]
1098 pub fn tim10en(&mut self) -> _TIM10ENW {
1099 _TIM10ENW { w: self }
1100 }
1101 #[doc = "Bit 18 - TIM11 clock enable"]
1102 #[inline]
1103 pub fn tim11en(&mut self) -> _TIM11ENW {
1104 _TIM11ENW { w: self }
1105 }
1106 #[doc = "Bit 20 - SPI5 clock enable"]
1107 #[inline]
1108 pub fn spi5en(&mut self) -> _SPI5ENW {
1109 _SPI5ENW { w: self }
1110 }
1111 #[doc = "Bit 21 - SPI6 clock enable"]
1112 #[inline]
1113 pub fn spi6en(&mut self) -> _SPI6ENW {
1114 _SPI6ENW { w: self }
1115 }
1116 #[doc = "Bit 22 - SAI1 clock enable"]
1117 #[inline]
1118 pub fn sai1en(&mut self) -> _SAI1ENW {
1119 _SAI1ENW { w: self }
1120 }
1121 #[doc = "Bit 26 - LTDC clock enable"]
1122 #[inline]
1123 pub fn ltdcen(&mut self) -> _LTDCENW {
1124 _LTDCENW { w: self }
1125 }
1126}