Struct stm32f40x::dma2::lisr::R
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pub struct R { /* fields omitted */ }
Value read from the register
Methods
impl R
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fn bits(&self) -> u32
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Value of the register as raw bits
fn tcif3(&self) -> TCIF3R
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Bit 27 - Stream x transfer complete interrupt flag(x = 3..0)
fn htif3(&self) -> HTIF3R
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Bit 26 - Stream x half transfer interrupt flag(x=3..0)
fn teif3(&self) -> TEIF3R
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Bit 25 - Stream x transfer error interrupt flag(x=3..0)
fn dmeif3(&self) -> DMEIF3R
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Bit 24 - Stream x direct mode error interrupt flag(x=3..0)
fn feif3(&self) -> FEIF3R
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Bit 22 - Stream x FIFO error interrupt flag(x=3..0)
fn tcif2(&self) -> TCIF2R
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Bit 21 - Stream x transfer complete interrupt flag(x = 3..0)
fn htif2(&self) -> HTIF2R
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Bit 20 - Stream x half transfer interrupt flag(x=3..0)
fn teif2(&self) -> TEIF2R
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Bit 19 - Stream x transfer error interrupt flag(x=3..0)
fn dmeif2(&self) -> DMEIF2R
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Bit 18 - Stream x direct mode error interrupt flag(x=3..0)
fn feif2(&self) -> FEIF2R
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Bit 16 - Stream x FIFO error interrupt flag(x=3..0)
fn tcif1(&self) -> TCIF1R
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Bit 11 - Stream x transfer complete interrupt flag(x = 3..0)
fn htif1(&self) -> HTIF1R
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Bit 10 - Stream x half transfer interrupt flag(x=3..0)
fn teif1(&self) -> TEIF1R
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Bit 9 - Stream x transfer error interrupt flag(x=3..0)
fn dmeif1(&self) -> DMEIF1R
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Bit 8 - Stream x direct mode error interrupt flag(x=3..0)
fn feif1(&self) -> FEIF1R
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Bit 6 - Stream x FIFO error interrupt flag(x=3..0)
fn tcif0(&self) -> TCIF0R
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Bit 5 - Stream x transfer complete interrupt flag(x = 3..0)
fn htif0(&self) -> HTIF0R
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Bit 4 - Stream x half transfer interrupt flag(x=3..0)
fn teif0(&self) -> TEIF0R
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Bit 3 - Stream x transfer error interrupt flag(x=3..0)
fn dmeif0(&self) -> DMEIF0R
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Bit 2 - Stream x direct mode error interrupt flag(x=3..0)
fn feif0(&self) -> FEIF0R
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Bit 0 - Stream x FIFO error interrupt flag(x=3..0)