Struct stm32f407g_disc::stm32f4::stm32f407::ethernet_mac::macdbgr::R

pub struct R { /* private fields */ }

Value read from the register

Implementations

impl R

pub fn bits(&self) -> u32

Value of the register as raw bits

pub fn tff(&self) -> TFFR

Bit 25 - Tx FIFO full

pub fn tfne(&self) -> TFNER

Bit 24 - Tx FIFO not empty

pub fn tfwa(&self) -> TFWAR

Bit 22 - Tx FIFO write active

pub fn tfrs(&self) -> TFRSR

Bits 20:21 - Tx FIFO read status

pub fn mtp(&self) -> MTPR

Bit 19 - MAC transmitter in pause

pub fn mtfcs(&self) -> MTFCSR

Bits 17:18 - MAC transmit frame controller status

pub fn mmtea(&self) -> MMTEAR

Bit 16 - MAC MII transmit engine active

pub fn rffl(&self) -> RFFLR

Bits 8:9 - Rx FIFO fill level

pub fn rfrcs(&self) -> RFRCSR

Bits 5:6 - Rx FIFO read controller status

pub fn rfwra(&self) -> RFWRAR

Bit 4 - Rx FIFO write controller active

pub fn msfrwcs(&self) -> MSFRWCSR

Bits 1:2 - MAC small FIFO read/write controllers status

pub fn mmrpea(&self) -> MMRPEAR

Bit 0 - MAC MII receive protocol engine active