stm32f4/stm32f407/uart4/
cr2.rs

1///Register `CR2` reader
2pub type R = crate::R<CR2rs>;
3///Register `CR2` writer
4pub type W = crate::W<CR2rs>;
5///Field `ADD` reader - Address of the USART node
6pub type ADD_R = crate::FieldReader;
7///Field `ADD` writer - Address of the USART node
8pub type ADD_W<'a, REG> = crate::FieldWriter<'a, REG, 4, u8, crate::Safe>;
9///LIN break detection interrupt enable
10pub use crate::stm32f407::usart1::cr2::LBDIE;
11///Field `LBDIE` reader - LIN break detection interrupt enable
12pub use crate::stm32f407::usart1::cr2::LBDIE_R;
13///Field `LBDIE` writer - LIN break detection interrupt enable
14pub use crate::stm32f407::usart1::cr2::LBDIE_W;
15///lin break detection length
16pub use crate::stm32f407::usart1::cr2::LBDL;
17///Field `LBDL` reader - lin break detection length
18pub use crate::stm32f407::usart1::cr2::LBDL_R;
19///Field `LBDL` writer - lin break detection length
20pub use crate::stm32f407::usart1::cr2::LBDL_W;
21/**STOP bits
22
23Value on reset: 0*/
24#[cfg_attr(feature = "defmt", derive(defmt::Format))]
25#[derive(Clone, Copy, Debug, PartialEq, Eq)]
26#[repr(u8)]
27pub enum STOP {
28    ///0: 1 stop bit
29    Stop1 = 0,
30    ///2: 2 stop bits
31    Stop2 = 2,
32}
33impl From<STOP> for u8 {
34    #[inline(always)]
35    fn from(variant: STOP) -> Self {
36        variant as _
37    }
38}
39impl crate::FieldSpec for STOP {
40    type Ux = u8;
41}
42impl crate::IsEnum for STOP {}
43///Field `STOP` reader - STOP bits
44pub type STOP_R = crate::FieldReader<STOP>;
45impl STOP_R {
46    ///Get enumerated values variant
47    #[inline(always)]
48    pub const fn variant(&self) -> Option<STOP> {
49        match self.bits {
50            0 => Some(STOP::Stop1),
51            2 => Some(STOP::Stop2),
52            _ => None,
53        }
54    }
55    ///1 stop bit
56    #[inline(always)]
57    pub fn is_stop1(&self) -> bool {
58        *self == STOP::Stop1
59    }
60    ///2 stop bits
61    #[inline(always)]
62    pub fn is_stop2(&self) -> bool {
63        *self == STOP::Stop2
64    }
65}
66///Field `STOP` writer - STOP bits
67pub type STOP_W<'a, REG> = crate::FieldWriter<'a, REG, 2, STOP>;
68impl<'a, REG> STOP_W<'a, REG>
69where
70    REG: crate::Writable + crate::RegisterSpec,
71    REG::Ux: From<u8>,
72{
73    ///1 stop bit
74    #[inline(always)]
75    pub fn stop1(self) -> &'a mut crate::W<REG> {
76        self.variant(STOP::Stop1)
77    }
78    ///2 stop bits
79    #[inline(always)]
80    pub fn stop2(self) -> &'a mut crate::W<REG> {
81        self.variant(STOP::Stop2)
82    }
83}
84///LIN mode enable
85pub use crate::stm32f407::usart1::cr2::LINEN;
86///Field `LINEN` reader - LIN mode enable
87pub use crate::stm32f407::usart1::cr2::LINEN_R;
88///Field `LINEN` writer - LIN mode enable
89pub use crate::stm32f407::usart1::cr2::LINEN_W;
90impl R {
91    ///Bits 0:3 - Address of the USART node
92    #[inline(always)]
93    pub fn add(&self) -> ADD_R {
94        ADD_R::new((self.bits & 0x0f) as u8)
95    }
96    ///Bit 5 - lin break detection length
97    #[inline(always)]
98    pub fn lbdl(&self) -> LBDL_R {
99        LBDL_R::new(((self.bits >> 5) & 1) != 0)
100    }
101    ///Bit 6 - LIN break detection interrupt enable
102    #[inline(always)]
103    pub fn lbdie(&self) -> LBDIE_R {
104        LBDIE_R::new(((self.bits >> 6) & 1) != 0)
105    }
106    ///Bits 12:13 - STOP bits
107    #[inline(always)]
108    pub fn stop(&self) -> STOP_R {
109        STOP_R::new(((self.bits >> 12) & 3) as u8)
110    }
111    ///Bit 14 - LIN mode enable
112    #[inline(always)]
113    pub fn linen(&self) -> LINEN_R {
114        LINEN_R::new(((self.bits >> 14) & 1) != 0)
115    }
116}
117impl core::fmt::Debug for R {
118    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
119        f.debug_struct("CR2")
120            .field("linen", &self.linen())
121            .field("stop", &self.stop())
122            .field("lbdie", &self.lbdie())
123            .field("lbdl", &self.lbdl())
124            .field("add", &self.add())
125            .finish()
126    }
127}
128impl W {
129    ///Bits 0:3 - Address of the USART node
130    #[inline(always)]
131    pub fn add(&mut self) -> ADD_W<CR2rs> {
132        ADD_W::new(self, 0)
133    }
134    ///Bit 5 - lin break detection length
135    #[inline(always)]
136    pub fn lbdl(&mut self) -> LBDL_W<CR2rs> {
137        LBDL_W::new(self, 5)
138    }
139    ///Bit 6 - LIN break detection interrupt enable
140    #[inline(always)]
141    pub fn lbdie(&mut self) -> LBDIE_W<CR2rs> {
142        LBDIE_W::new(self, 6)
143    }
144    ///Bits 12:13 - STOP bits
145    #[inline(always)]
146    pub fn stop(&mut self) -> STOP_W<CR2rs> {
147        STOP_W::new(self, 12)
148    }
149    ///Bit 14 - LIN mode enable
150    #[inline(always)]
151    pub fn linen(&mut self) -> LINEN_W<CR2rs> {
152        LINEN_W::new(self, 14)
153    }
154}
155/**Control register 2
156
157You can [`read`](crate::Reg::read) this register and get [`cr2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
158
159See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F407.html#UART4:CR2)*/
160pub struct CR2rs;
161impl crate::RegisterSpec for CR2rs {
162    type Ux = u16;
163}
164///`read()` method returns [`cr2::R`](R) reader structure
165impl crate::Readable for CR2rs {}
166///`write(|w| ..)` method takes [`cr2::W`](W) writer structure
167impl crate::Writable for CR2rs {
168    type Safety = crate::Unsafe;
169}
170///`reset()` method sets CR2 to value 0
171impl crate::Resettable for CR2rs {}
stm32f4/stm32f407/uart4/cr2.rs

stm32f4/stm32f407/uart4/
cr2.rs
