stm32f4/stm32f407/spi1/
sr.rs

1///Register `SR` reader
2pub type R = crate::R<SRrs>;
3///Register `SR` writer
4pub type W = crate::W<SRrs>;
5/**Receive buffer not empty
6
7Value on reset: 0*/
8#[cfg_attr(feature = "defmt", derive(defmt::Format))]
9#[derive(Clone, Copy, Debug, PartialEq, Eq)]
10pub enum RXNE {
11    ///0: Rx buffer empty
12    Empty = 0,
13    ///1: Rx buffer not empty
14    NotEmpty = 1,
15}
16impl From<RXNE> for bool {
17    #[inline(always)]
18    fn from(variant: RXNE) -> Self {
19        variant as u8 != 0
20    }
21}
22///Field `RXNE` reader - Receive buffer not empty
23pub type RXNE_R = crate::BitReader<RXNE>;
24impl RXNE_R {
25    ///Get enumerated values variant
26    #[inline(always)]
27    pub const fn variant(&self) -> RXNE {
28        match self.bits {
29            false => RXNE::Empty,
30            true => RXNE::NotEmpty,
31        }
32    }
33    ///Rx buffer empty
34    #[inline(always)]
35    pub fn is_empty(&self) -> bool {
36        *self == RXNE::Empty
37    }
38    ///Rx buffer not empty
39    #[inline(always)]
40    pub fn is_not_empty(&self) -> bool {
41        *self == RXNE::NotEmpty
42    }
43}
44/**Transmit buffer empty
45
46Value on reset: 1*/
47#[cfg_attr(feature = "defmt", derive(defmt::Format))]
48#[derive(Clone, Copy, Debug, PartialEq, Eq)]
49pub enum TXE {
50    ///0: Tx buffer not empty
51    NotEmpty = 0,
52    ///1: Tx buffer empty
53    Empty = 1,
54}
55impl From<TXE> for bool {
56    #[inline(always)]
57    fn from(variant: TXE) -> Self {
58        variant as u8 != 0
59    }
60}
61///Field `TXE` reader - Transmit buffer empty
62pub type TXE_R = crate::BitReader<TXE>;
63impl TXE_R {
64    ///Get enumerated values variant
65    #[inline(always)]
66    pub const fn variant(&self) -> TXE {
67        match self.bits {
68            false => TXE::NotEmpty,
69            true => TXE::Empty,
70        }
71    }
72    ///Tx buffer not empty
73    #[inline(always)]
74    pub fn is_not_empty(&self) -> bool {
75        *self == TXE::NotEmpty
76    }
77    ///Tx buffer empty
78    #[inline(always)]
79    pub fn is_empty(&self) -> bool {
80        *self == TXE::Empty
81    }
82}
83/**Channel side
84
85Value on reset: 0*/
86#[cfg_attr(feature = "defmt", derive(defmt::Format))]
87#[derive(Clone, Copy, Debug, PartialEq, Eq)]
88pub enum CHSIDE {
89    ///0: Channel left has to be transmitted or has been received
90    Left = 0,
91    ///1: Channel right has to be transmitted or has been received
92    Right = 1,
93}
94impl From<CHSIDE> for bool {
95    #[inline(always)]
96    fn from(variant: CHSIDE) -> Self {
97        variant as u8 != 0
98    }
99}
100///Field `CHSIDE` reader - Channel side
101pub type CHSIDE_R = crate::BitReader<CHSIDE>;
102impl CHSIDE_R {
103    ///Get enumerated values variant
104    #[inline(always)]
105    pub const fn variant(&self) -> CHSIDE {
106        match self.bits {
107            false => CHSIDE::Left,
108            true => CHSIDE::Right,
109        }
110    }
111    ///Channel left has to be transmitted or has been received
112    #[inline(always)]
113    pub fn is_left(&self) -> bool {
114        *self == CHSIDE::Left
115    }
116    ///Channel right has to be transmitted or has been received
117    #[inline(always)]
118    pub fn is_right(&self) -> bool {
119        *self == CHSIDE::Right
120    }
121}
122/**Underrun flag
123
124Value on reset: 0*/
125#[cfg_attr(feature = "defmt", derive(defmt::Format))]
126#[derive(Clone, Copy, Debug, PartialEq, Eq)]
127pub enum UDRR {
128    ///0: No underrun occurred
129    NoUnderrun = 0,
130    ///1: Underrun occurred
131    Underrun = 1,
132}
133impl From<UDRR> for bool {
134    #[inline(always)]
135    fn from(variant: UDRR) -> Self {
136        variant as u8 != 0
137    }
138}
139///Field `UDR` reader - Underrun flag
140pub type UDR_R = crate::BitReader<UDRR>;
141impl UDR_R {
142    ///Get enumerated values variant
143    #[inline(always)]
144    pub const fn variant(&self) -> UDRR {
145        match self.bits {
146            false => UDRR::NoUnderrun,
147            true => UDRR::Underrun,
148        }
149    }
150    ///No underrun occurred
151    #[inline(always)]
152    pub fn is_no_underrun(&self) -> bool {
153        *self == UDRR::NoUnderrun
154    }
155    ///Underrun occurred
156    #[inline(always)]
157    pub fn is_underrun(&self) -> bool {
158        *self == UDRR::Underrun
159    }
160}
161/**CRC error flag
162
163Value on reset: 0*/
164#[cfg_attr(feature = "defmt", derive(defmt::Format))]
165#[derive(Clone, Copy, Debug, PartialEq, Eq)]
166pub enum CRCERRR {
167    ///0: CRC value received matches the SPIx_RXCRCR value
168    Match = 0,
169    ///1: CRC value received does not match the SPIx_RXCRCR value
170    NoMatch = 1,
171}
172impl From<CRCERRR> for bool {
173    #[inline(always)]
174    fn from(variant: CRCERRR) -> Self {
175        variant as u8 != 0
176    }
177}
178///Field `CRCERR` reader - CRC error flag
179pub type CRCERR_R = crate::BitReader<CRCERRR>;
180impl CRCERR_R {
181    ///Get enumerated values variant
182    #[inline(always)]
183    pub const fn variant(&self) -> CRCERRR {
184        match self.bits {
185            false => CRCERRR::Match,
186            true => CRCERRR::NoMatch,
187        }
188    }
189    ///CRC value received matches the SPIx_RXCRCR value
190    #[inline(always)]
191    pub fn is_match(&self) -> bool {
192        *self == CRCERRR::Match
193    }
194    ///CRC value received does not match the SPIx_RXCRCR value
195    #[inline(always)]
196    pub fn is_no_match(&self) -> bool {
197        *self == CRCERRR::NoMatch
198    }
199}
200/**CRC error flag
201
202Value on reset: 0*/
203#[cfg_attr(feature = "defmt", derive(defmt::Format))]
204#[derive(Clone, Copy, Debug, PartialEq, Eq)]
205pub enum CRCERRW {
206    ///0: Clear flag
207    Clear = 0,
208}
209impl From<CRCERRW> for bool {
210    #[inline(always)]
211    fn from(variant: CRCERRW) -> Self {
212        variant as u8 != 0
213    }
214}
215///Field `CRCERR` writer - CRC error flag
216pub type CRCERR_W<'a, REG> = crate::BitWriter0C<'a, REG, CRCERRW>;
217impl<'a, REG> CRCERR_W<'a, REG>
218where
219    REG: crate::Writable + crate::RegisterSpec,
220{
221    ///Clear flag
222    #[inline(always)]
223    pub fn clear(self) -> &'a mut crate::W<REG> {
224        self.variant(CRCERRW::Clear)
225    }
226}
227/**Mode fault
228
229Value on reset: 0*/
230#[cfg_attr(feature = "defmt", derive(defmt::Format))]
231#[derive(Clone, Copy, Debug, PartialEq, Eq)]
232pub enum MODFR {
233    ///0: No mode fault occurred
234    NoFault = 0,
235    ///1: Mode fault occurred
236    Fault = 1,
237}
238impl From<MODFR> for bool {
239    #[inline(always)]
240    fn from(variant: MODFR) -> Self {
241        variant as u8 != 0
242    }
243}
244///Field `MODF` reader - Mode fault
245pub type MODF_R = crate::BitReader<MODFR>;
246impl MODF_R {
247    ///Get enumerated values variant
248    #[inline(always)]
249    pub const fn variant(&self) -> MODFR {
250        match self.bits {
251            false => MODFR::NoFault,
252            true => MODFR::Fault,
253        }
254    }
255    ///No mode fault occurred
256    #[inline(always)]
257    pub fn is_no_fault(&self) -> bool {
258        *self == MODFR::NoFault
259    }
260    ///Mode fault occurred
261    #[inline(always)]
262    pub fn is_fault(&self) -> bool {
263        *self == MODFR::Fault
264    }
265}
266/**Overrun flag
267
268Value on reset: 0*/
269#[cfg_attr(feature = "defmt", derive(defmt::Format))]
270#[derive(Clone, Copy, Debug, PartialEq, Eq)]
271pub enum OVRR {
272    ///0: No overrun occurred
273    NoOverrun = 0,
274    ///1: Overrun occurred
275    Overrun = 1,
276}
277impl From<OVRR> for bool {
278    #[inline(always)]
279    fn from(variant: OVRR) -> Self {
280        variant as u8 != 0
281    }
282}
283///Field `OVR` reader - Overrun flag
284pub type OVR_R = crate::BitReader<OVRR>;
285impl OVR_R {
286    ///Get enumerated values variant
287    #[inline(always)]
288    pub const fn variant(&self) -> OVRR {
289        match self.bits {
290            false => OVRR::NoOverrun,
291            true => OVRR::Overrun,
292        }
293    }
294    ///No overrun occurred
295    #[inline(always)]
296    pub fn is_no_overrun(&self) -> bool {
297        *self == OVRR::NoOverrun
298    }
299    ///Overrun occurred
300    #[inline(always)]
301    pub fn is_overrun(&self) -> bool {
302        *self == OVRR::Overrun
303    }
304}
305/**Busy flag
306
307Value on reset: 0*/
308#[cfg_attr(feature = "defmt", derive(defmt::Format))]
309#[derive(Clone, Copy, Debug, PartialEq, Eq)]
310pub enum BSYR {
311    ///0: SPI not busy
312    NotBusy = 0,
313    ///1: SPI busy
314    Busy = 1,
315}
316impl From<BSYR> for bool {
317    #[inline(always)]
318    fn from(variant: BSYR) -> Self {
319        variant as u8 != 0
320    }
321}
322///Field `BSY` reader - Busy flag
323pub type BSY_R = crate::BitReader<BSYR>;
324impl BSY_R {
325    ///Get enumerated values variant
326    #[inline(always)]
327    pub const fn variant(&self) -> BSYR {
328        match self.bits {
329            false => BSYR::NotBusy,
330            true => BSYR::Busy,
331        }
332    }
333    ///SPI not busy
334    #[inline(always)]
335    pub fn is_not_busy(&self) -> bool {
336        *self == BSYR::NotBusy
337    }
338    ///SPI busy
339    #[inline(always)]
340    pub fn is_busy(&self) -> bool {
341        *self == BSYR::Busy
342    }
343}
344/**TI frame format error
345
346Value on reset: 0*/
347#[cfg_attr(feature = "defmt", derive(defmt::Format))]
348#[derive(Clone, Copy, Debug, PartialEq, Eq)]
349pub enum FRER {
350    ///0: No frame format error
351    NoError = 0,
352    ///1: A frame format error occurred
353    Error = 1,
354}
355impl From<FRER> for bool {
356    #[inline(always)]
357    fn from(variant: FRER) -> Self {
358        variant as u8 != 0
359    }
360}
361///Field `FRE` reader - TI frame format error
362pub type FRE_R = crate::BitReader<FRER>;
363impl FRE_R {
364    ///Get enumerated values variant
365    #[inline(always)]
366    pub const fn variant(&self) -> FRER {
367        match self.bits {
368            false => FRER::NoError,
369            true => FRER::Error,
370        }
371    }
372    ///No frame format error
373    #[inline(always)]
374    pub fn is_no_error(&self) -> bool {
375        *self == FRER::NoError
376    }
377    ///A frame format error occurred
378    #[inline(always)]
379    pub fn is_error(&self) -> bool {
380        *self == FRER::Error
381    }
382}
383impl R {
384    ///Bit 0 - Receive buffer not empty
385    #[inline(always)]
386    pub fn rxne(&self) -> RXNE_R {
387        RXNE_R::new((self.bits & 1) != 0)
388    }
389    ///Bit 1 - Transmit buffer empty
390    #[inline(always)]
391    pub fn txe(&self) -> TXE_R {
392        TXE_R::new(((self.bits >> 1) & 1) != 0)
393    }
394    ///Bit 2 - Channel side
395    #[inline(always)]
396    pub fn chside(&self) -> CHSIDE_R {
397        CHSIDE_R::new(((self.bits >> 2) & 1) != 0)
398    }
399    ///Bit 3 - Underrun flag
400    #[inline(always)]
401    pub fn udr(&self) -> UDR_R {
402        UDR_R::new(((self.bits >> 3) & 1) != 0)
403    }
404    ///Bit 4 - CRC error flag
405    #[inline(always)]
406    pub fn crcerr(&self) -> CRCERR_R {
407        CRCERR_R::new(((self.bits >> 4) & 1) != 0)
408    }
409    ///Bit 5 - Mode fault
410    #[inline(always)]
411    pub fn modf(&self) -> MODF_R {
412        MODF_R::new(((self.bits >> 5) & 1) != 0)
413    }
414    ///Bit 6 - Overrun flag
415    #[inline(always)]
416    pub fn ovr(&self) -> OVR_R {
417        OVR_R::new(((self.bits >> 6) & 1) != 0)
418    }
419    ///Bit 7 - Busy flag
420    #[inline(always)]
421    pub fn bsy(&self) -> BSY_R {
422        BSY_R::new(((self.bits >> 7) & 1) != 0)
423    }
424    ///Bit 8 - TI frame format error
425    #[inline(always)]
426    pub fn fre(&self) -> FRE_R {
427        FRE_R::new(((self.bits >> 8) & 1) != 0)
428    }
429}
430impl core::fmt::Debug for R {
431    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
432        f.debug_struct("SR")
433            .field("fre", &self.fre())
434            .field("bsy", &self.bsy())
435            .field("ovr", &self.ovr())
436            .field("modf", &self.modf())
437            .field("crcerr", &self.crcerr())
438            .field("udr", &self.udr())
439            .field("chside", &self.chside())
440            .field("txe", &self.txe())
441            .field("rxne", &self.rxne())
442            .finish()
443    }
444}
445impl W {
446    ///Bit 4 - CRC error flag
447    #[inline(always)]
448    pub fn crcerr(&mut self) -> CRCERR_W<SRrs> {
449        CRCERR_W::new(self, 4)
450    }
451}
452/**status register
453
454You can [`read`](crate::Reg::read) this register and get [`sr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
455
456See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F407.html#SPI1:SR)*/
457pub struct SRrs;
458impl crate::RegisterSpec for SRrs {
459    type Ux = u16;
460}
461///`read()` method returns [`sr::R`](R) reader structure
462impl crate::Readable for SRrs {}
463///`write(|w| ..)` method takes [`sr::W`](W) writer structure
464impl crate::Writable for SRrs {
465    type Safety = crate::Unsafe;
466    const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0x10;
467}
468///`reset()` method sets SR to value 0x02
469impl crate::Resettable for SRrs {
470    const RESET_VALUE: u16 = 0x02;
471}
stm32f4/stm32f407/spi1/sr.rs

stm32f4/stm32f407/spi1/
sr.rs
