Module stm32f4::stm32f413::rcc::pllcfgr

PLL configuration register

Structs

PLLCFGR_SPEC

PLL configuration register

PLLM_R

Field PLLM reader - Division factor for the main PLL (PLL) and audio PLL (PLLI2S) input clock

PLLM_W

Field PLLM writer - Division factor for the main PLL (PLL) and audio PLL (PLLI2S) input clock

PLLN_R

Field PLLN reader - Main PLL (PLL) multiplication factor for VCO

PLLN_W

Field PLLN writer - Main PLL (PLL) multiplication factor for VCO

PLLP_R

Field PLLP reader - Main PLL (PLL) division factor for main system clock

PLLP_W

Field PLLP writer - Main PLL (PLL) division factor for main system clock

PLLQ_R

Field PLLQ reader - Main PLL (PLL) division factor for USB OTG FS, SDIO and random number generator clocks

PLLQ_W

Field PLLQ writer - Main PLL (PLL) division factor for USB OTG FS, SDIO and random number generator clocks

PLLR_R

Field PLLR reader - Main PLL (PLL) division factor for I2S, DFSDM clocks

PLLR_W

Field PLLR writer - Main PLL (PLL) division factor for I2S, DFSDM clocks

PLLSRC_R

Field PLLSRC reader - Main PLL(PLL) and audio PLL (PLLI2S) entry clock source

PLLSRC_W

Field PLLSRC writer - Main PLL(PLL) and audio PLL (PLLI2S) entry clock source

R

Register PLLCFGR reader

W

Register PLLCFGR writer

Enums

PLLP_A

Main PLL (PLL) division factor for main system clock

PLLSRC_A

Main PLL(PLL) and audio PLL (PLLI2S) entry clock source