[−][src]Type Definition stm32f4::stm32f469::otg_hs_global::TX0FSIZ_PERIPHERAL
type TX0FSIZ_PERIPHERAL = Reg<u32, _TX0FSIZ_PERIPHERAL>;
Endpoint 0 transmit FIFO size (peripheral mode)
This register you can read
, reset
, write
, write_with_zero
, modify
. See API.
For information about available fields see tx0fsiz_peripheral module
Trait Implementations
impl Readable for TX0FSIZ_PERIPHERAL
[src]
read()
method returns tx0fsiz_peripheral::R reader structure
impl ResetValue for TX0FSIZ_PERIPHERAL
[src]
Register TX0FSIZ_Peripheral reset()
's with value 0x0200
impl Writable for TX0FSIZ_PERIPHERAL
[src]
write(|w| ..)
method takes tx0fsiz_peripheral::W writer structure